IBIS MACRO TOOLS AND SCRIPTS IBIS-to-AMS_conversion_tool.zip PERL script reads IBIS files to produce files containing IBIS buffer data in 'define' format, suitable for including in a Verilog-A or VHDL-AMS macro netlist. Now with a GUI (requires PerlTk). Macro_library_documentation_tool.zip PERL script to extract module documentation comment blocks from Verilog-A files, store them in XML format, and annotate them into Verilog-A or VHDL-AMS files. IBIS ADVANCED TECHNOLOGY MODELING TOOLS AND SCRIPTS Cadence_IBIS_AMI_Evaluation_Toolkit_v1_1.zip Complete Toolkit for IP vendors (model developers) to quickly build, compile and test Algorithmic Modeling Interface (AMI) models. AMI models are compiled into a Shared Object library that can be plugged in any PCB simulation environment that support AMI models. The compiled models encapsulate signal processing functions that are used to encode (TX) and decode (RX) signals so that they can travel long distance on the PCB or backplane (channel). SiSoft_IBIS-AMI_Eval_Toolkit_v2_01.zip Complete test suite for evaluating compiled AMI models.