****************************************************************************** ****************************************************************************** BUFFER ISSUE RESOLUTION DOCUMENT (BIRD) BIRD ID#: 90.2 ISSUE TITLE: Multiple A_to_D Subparameters Clarification REQUESTOR: Bob Ross, Teraspeed Consulting Group DATE SUBMITTED: August 17, 2004 DATE REVISED: September 1, 2004, September 22, 2004 DATE ACCEPTED BY IBIS OPEN FORUM: October 29, 2004 ****************************************************************************** ****************************************************************************** STATEMENT OF THE ISSUE: The text under [External Circuit] is ambiguous regarding the number of permitted distinct subparameter port_names can be used for A_to_D |* BIRD90.1 - Editorial - port_name(s) is replaced with port name(s)." ****************************************************************************** STATEMENT OF THE RESOLVED SPECIFICATIONS: In Section 6b Under the [External Circuit] keyword: Under D_to_A: | Any number of D_to_A subparameter lines is allowed, so long as |* each contains a unique port name entry and at least one unique | port1 or port2 entry (i.e., several D_to_A declarations may | use the same reference node under port1 or port2). At least | one D_to_A line must be present, corresponding to the "Typ" | corner model, for each digital line to be converted. | Additional D_to_A lines for other corners may be omitted. In | this case, the typical corner D_to_A entries will apply to all | model corners and the "Typ" corner_name entry may be omitted. | Under A_to_D replace: | | Any number of A_to_D subparameter lines is allowed, so long | as each contains a unique port_name entry and at least one | unique port1 or port2 entry (i.e., several A_to_D declarations | may use the same reference node under port1 or port2). For | example, a user may wish to create additional A_to_D | converters for individual analog signals to monitor common | mode behaviors on differential buffers (see below). | With this paragraph | Any number of A_to_D subparameter lines is allowed, so long | as each line contains at least one column entry which is | distinct from the column entries of all other lines. In | practice, this means that A_to_D subparameter lines |** describing different corners will have identical port names. | Other kinds of variations described through A_to_D |** subparameter lines should use unique port names. For example, | a user may wish to create additional A_to_D converters for | individual analog signals to monitor common mode behaviors on | differential buffers. ****************************************************************************** ANALYSIS PATH/DATA THAT LED TO SPECIFICATION When the corner_name column was entered, the following paragraph was not revised to capture the fact that three identical A_to_D lines could be added with identical information except for the corner_names. For reference, the first part of the A_to_D section is given for context: | A_to_D: | | The A_to_D subparameter is used to generate a digital state | ('0', '1', or 'X') based on analog voltages from the SPICE | model or from the pad/pin. This allows an analog signal from | the external SPICE circuit to be read as a digital signal by | the simulation tool. Each analog port which carries data for | conversion to digital format must have its own A_to_D | declaration line. | | The A_to_D subparameter is followed by six arguments: | | d_port port1 port2 vlow vhigh corner_name | | The d_port entry lists port names to be used for digital | signals going. As with D_to_A, the port1 entry would contain | a user-defined analog signal. Port2 would list another port | name to be used as a reference. The voltage measurements are | taken from the port1 entry with respect to the port2 entry. | These ports must also be named by the Ports subparameter. | | The vlow and vhigh entries list the low and high analog | threshold voltage values. The reported digital state on | D_receive will be '0' if the measured voltage is lower than | the vlow value, '1' if above the vhigh value, and 'X' | otherwise. | | The corner_name entry holds the name of the external model | corner being referenced, as listed under the Corner | subparameter. | | Any number of A_to_D subparameter lines is allowed, so long | as each contains a unique port_name entry and at least one | unique port1 or port2 entry (i.e., several A_to_D declarations | may use the same reference node under port1 or port2). For | example, a user may wish to create additional A_to_D | converters for individual analog signals to monitor common | mode behaviors on differential buffers (see below). | | At least one A_to_D line must be supplied corresponding to the | "Typ" corner model. Other A_to_D lines for other corners may | be omitted. In this case, the typical corner D_to_A entries | will apply to all model corners. | BIRD90.1: The text port_name(s) is corrected to port name(s). There is no equivalent statements under the [External Model] keyword, so no change is needed. BIRD90.2 two occurances pr port_name noted by |* lines were NOT changed. This is corrected in BIRD90.2 by |** lines ****************************************************************************** ANY OTHER BACKGROUND INFORMATION: Jon Powell originally asked for clarification of an apparent specification contradiction while working on the ibischk4.1 parser project. ****************************************************************************** ******************************************************************************