Re: typ outside min,max

From: Bob Ross <bob@icx.com>
Date: Fri Nov 14 1997 - 15:59:28 PST

Paul:

In one particular BiCMOS device where I did s2ibis conversions
for an ABT Spice model using voltage, temperature, and process
variations, I got min and max tables crossing the typ tables in
the clamping region, and also points where the typ data was
larger than the min and max data at .3V and the min data was
larger than the max data at .2V for the [Pulldown] table.
So I have a real situation that demostrates what Andy is
referring to.

Bob Ross
Interconnectix

> Date: Fri, 14 Nov 97 18:05:12 EST
> From: Andrew Ingraham <ingraham@wrksys.ENET.dec.com>
> To: pgregory@hpbs2933.boi.hp.com
> Cc: ibis-users@vhdl.org, ingraham@wrksys.ENET.dec.com
> Apparently-To: ibis-users@vhdl.org, pgregory@hpbs2933.boi.hp.com
> Subject: Re: typ outside min,max
> Status: R

> Indeed, the IBIS "min" and "max" columns do not necessarily represent
> the min and max extremes of output current.

> The "min" column represents "slow" or "weak" conditions: weak process,
> supply voltages are at minimum, and temperature is either minimum (for
> bipolar) or maximum (CMOS). The "max" column is the opposite.

> I think it is conceivable that some intermediate conditions might fall
> outside these two cases over limited voltage regions, especially if
> there is anything in the buffer that is very nonlinear, even as simple
> as a diode. Places where the I/V curves have sharp curvature, are
> more susceptible. I/V curves do not always simply scale up and down
> vertically (vs. voltage) as you vary temperature and supply voltage;
> they also shift somewhat left or right, which can appear to move
> portions of the curves the wrong way when you are looking only at
> I vs. V.

> If the device is Bi-CMOS, odd things can happen vs. temperature.
> Some bi-CMOS parts get faster/stronger with lower temperatures, some
> do the opposite, others may do a combination of both.

> If your IBIS model was prepared correctly (a *big* IF), my guess is
> this is bipolar or bi-CMOS, judging by the strong nonlinearity of the
> pulldown around 0V.

> Notice that it's not only the two points you highlighted that look out
> of place, but the entire region shown below 0V. I(typ) is about twice
> I(max) down there!

> Also note that the curves miss the origin by milliamps. Some buffers
> really do this. Or maybe it's measurement error. Or an error
> compiling the measured or simulated data into the IBIS model (since
> we're looking only at the [Pulldown] table).

> Regards,
> Andy Ingraham

 
Received on Fri Nov 14 16:04:33 1997

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