RE: standard loads on 66 MHz PCI

From: Muranyi, Arpad <arpad.muranyi@intel.com>
Date: Fri Nov 06 1998 - 16:09:00 PST

Greg,

You can put the two Vref numbers into the IBIS model and comment one of them

out. Unfortunately this means that you have to simulate things twice (with
most IBIS based simulators), but fortunately the waveforms are not effected
by
this, only the flight time measurements. So one of the simulations could do

the falling edge measurements, and the other one the rising edge
measurements.
If you need more detail send me another EMAIL, and I will give you an
example.

Arpad Muranyi
Intel Corporation
============================================================================

A question came up here at IBM today that I could not answer. Has anyone
run
into this?

The 66 MHz PCI bus spec has a different standard load for rising and falling

edges. (10 pF and 25 Ohms to gnd for rising OR 10 pF and 25 Ohms to Vcc for

falling.) As I read version 3.1 of IBIS, it only allows one value of Vref
per
[Model] keyword. This seems to make the 66 MHz PCI driver unable to be
implemented in IBIS, at least if you want to do timing analysis. I would
think
someone else probably encountered this already. How did you get around it?
Or
am I missing something?

Much thanks in advance.

Greg Edlund
Advisory Engineer, AS/400 System Timing
IBM
3650 Hwy. 52 N, Dept. HDC
Rochester, MN 55901
gedlund@us.ibm.com
Received on Fri Nov 6 16:16:18 1998

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