IBIS SUMMIT ANNOUNCEMENT JAN. 31, 2000

From: Bob Ross <bob_ross@mentorg.com>
Date: Tue Jan 18 2000 - 14:01:15 PST

To IBIS Committee:

I am sending this out on behalf of Milt.

Bob Ross
Mentor Graphics

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To All:

This is the final call for presentations and participation at the
IBIS Summit Meeting held with DesignCon 2000.

If you have not done so, PLEASE signup with me below so we have an
estimated attendence count for planning the lunch.

Milt Schwartz
National Semiconductor

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    DESIGNCON 2000 IBIS SUMMIT FINAL CALL FOR PARTICIPATION, PRESENTATIONS
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                     I B I S S U M M I T M E E T I N G

Time/Date: 8:00 PM - 5:00 PM, Monday, January 31, 2000

Location: Santa Clara Convention Center
               Santa Clara, CA

               Meeting Location - Weston Hotel, Grand Ballroom C

Content: IBIS Future Requirements is the main topic of this meeting
               These include an exchange of ideas on IBIS accuracy,
               connectors, and new requirements under discussion.

Purpose: Solicit and Exchange IBIS Model Related Information and Ideas.

Sponsors: DesignCon 2000 & National Semiconductor Corporation

SIGN UP FOR THE IBIS Summit by sending a note to the address below:

               Milt Schwartz
               schwartz@nsc.com

                   D E S I G N C O N 2 0 0 0 M E E T I N G S

Time/Date: Monday - Thursday, January 31 - February 3, 2000

Exhibition: Tuesday - Wednesday, 12:30 PM - 6:30 PM, February 1 - 2, 2000

IBIS Booth: #1039, Exhibition Hall
               - Connector Specification and Accuracy Committee Demonstration
               - IBIS Information
               - Contact Jon Powell, jpowell@viewlogic.com, for information.

URL DesignCon2000:
               http://www.designcon.com/

Signup Discount:
               IBIS member companies may receive a 15 percent discount to
               the DesignCon 2000 Conference. Past Conference attendees
               also will receive a 20% alumni discount.

AGENDA FOR IBIS SUMMIT

The agenda includes presentations, discussions, refreshments, and a free
buffet luncheon for participants. In addition, we will have an opportunity
for Ad Hoc presentations and extended discussions.

So far we tentatively plan the following presentations and discussions:

Morning:

  Model Design: Tables and Equations - Lynne Green, HyperLynx
  Connector Model Specification - Gus Panella, Molex

Afternoon:

  Using Statistical Methods to Characterize Receivers to Determine the
    Applicability of Receiver Modeling Standardization
                                                   - Richard Mellitz, Intel
  Input Receiver Modeling - Don Telium, Cadence
  Extendable Macro Structures of IBIS - Al Davis, HyperLynx
  Ideas for Future IBIS Versions - Arpad Muranyi, Intel
  Discussion - Future of IBIS - Stephen Peters, Intel

Adequate time is set aside for Ad Hoc presentations and discussion.

Presentors, plan on 50 copies for handing out. Or else, National
Semiconductor will make and bring the copies of the presentations are
received by Milt Schwartz by Wednesday, January 26, 2000.
Received on Tue Jan 18 14:02:47 2000

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