RE: IBIS connector model

Are you trying to extract the topology from a board2board file? Specctraquest
has a feature called "Design link". In this window, you can specify the pin
to pin interconnection, the length and a pointer to your "dml" conn model.
This's another area Specctraquest would spit out error message if your conn
model has a pin count or pin reference mismatch with Allegro boardfile. Note
your conn.ibs file will need to translated to Specctraquest DML format. I use
ibis2signoise to do this. Yes, Specctraquest v13.5 or newer should be able
to translate Ibis v 3.1 pkg format.

As far as obtaining model, I had similar problem obtaining Ibis conn model.
Depend on your simulation accuracy requirement, it's pretty easy to create a
simple lumped single line PCI model in Specctraquest. You can obtain SLM and
MLM data from
AMP or other conn vendors. More accurate pkg/conn model will need to be
translated directly from vendor Spice format to Cadence K-spice format.
Unfortunately, 6 months ago I inquired Cadence regarding of an automate
script to do the spice translation without any success. Specctraquest does
have sample of generic pkg models shipped with this tool.

Dat Le
*****************************************
System Engineer
IBM-NumaQ
dle@sequent.com
(503)578-3412
*****************************************

> -----Original Message-----
> From: Ross Pryor [SMTP:rpryor@nortelnetworks.com]
> Sent: Monday, May 22, 2000 6:42 AM
> To: Kanal_Bashu@emc.com; ibis-users@eda.org
> Subject: RE: IBIS connector model
>
> I believe this error is due to the "pinuse" property of your connector pins
> in the Allegro symbol for the connector. You need to
> set the property to "unspec" on all connector pins.
>
> -----Original Message-----
> From: Kanal_Bashu@emc.com [mailto:Kanal_Bashu@emc.com]
> Sent: Monday, May 22, 2000 7:40 AM
> To: ibis-users@eda.org
> Subject: IBIS connector model
>
>
> I am trying to extract a topology using SpectraQuest, but cannot because
> of the following error. "Errors: Connector With Active pin". The model is
> attached to this message. Can anyone clarify the proper use of connector
> models in circuit simulation or provide me with a connector model?
>
> Regards,
>
> Bashu Kanal
> EMC Corporation
> Design Verification Group
> <<conn149.ibs>>
Received on Mon May 22 08:49:33 2000