(no subject)

From: <erniem@mdhost.cse.TEK.COM>
Date: Fri Aug 18 1995 - 08:02:26 PDT

>The problem isn't that IBIS cannot handle non-monotonic drivers. The problem is
>more that the silicon vendors have not yet supplied the necessary information about
>their devices that would let anyone figure out how to model them. Detailed SPICE
>models that reliably predict behavior would be necessary in order for the IBIS committe
>to come up with an acceptable methodology to perform behavioral modeling. Current versions
>of these drivers are so secret that we are not even sure we can admit that we know they
>are secret.

>jon powell
>Quad Design

  The secrecy evidenced by silicon vendors is paralleled by the vendors of design tools
using IBIS data. The mathematical usage of IBIS data is shrouded in mystery. Indeed, no part
of the IBIS standard indicates how the data is to be used to insure that an adequate analytic
representation of the silicon is made during signal integrity simulation. "Methodology" above
refers to the acquisition of data, not modeling in the sense that occurs for circuit simulation
such as with Spice.

  In the realm of Spice simulation, the design community, academia and CAD software suppliers
debate at great length the analytic adequacy of representative equations. Strategies for
mathematical representation lie at the core of model evolution. Within IBIS, public strategies
appear to be data focused, generating great arguments concerning what measurements to make
and how to format these for general distribution. In such an arena, engineers cannot decide
whether the IBIS data contains the information and the tools contain the analytic horsepower
to lead to a successful prediction of system performance.

  For CFI, EDAC orSematech to fashion a meaningful roadmap for addressing signal integrity
issues for the next ten years I would suggest the move to the analytic focus that has proven
so fruitful for integrated circuit design. Assemble university representatives, designers and
suppliers of tools to debate a suitable mathematical representation for behavioral modeling of
interconnect, packaging and silicon drivers and receivers.
Received on Fri Aug 18 08:10:32 1995

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