EGG9 and C_comp

Hello Bob, and others:

    In your diagram in EGG9, you show C_comp and being in
parallel with Ct (the circuit representation of transit time).

         Pad X------------------------| DEVICE
                      | | |
                      | | |
                     --- --- +------
                  Ct --- C_comp ---
                      | |
                      | |
                      -------------
                      gnd gnd
                    

For the [TTgnd] case that is how I would draw it, but what about the
[TTpwr] case? I've always thought of C_comp as between the I/O
node and ground. Could C_comp be also modeled between the pad and Vcc?
Does it make a difference (at least as far as our black box
representation goes)? Just wondering.....

          Thanks,
          Stephen Peters
          Intel Corp.
Received on Mon Dec 11 13:51:31 1995