Dynamic Noise Immunity Spec.

Hello Everyone
Below is my AR from the last meeting.
...

STATEMENT OF THE ISSUE
     
Currently, IBIS specifies input logic "low/high" DC voltages for
input and I/O model-types (i.e. Vinl and Vinh).
  
This information does not specify the required time for a signal to
stay at Vinl or Vinh before an input is sufficiently disturbed to
cause a level switch. Therefore, pulse amplitude Vs pulse width data is
needed to complete the specification. Figure 1 shows a generic plot of
such data.

   
               ^
         PULSE | *
               |
         A |
         M | *
          P |
          L | * Sufficient
          I | Energy
         T | *
         U | *
         D |
         E | *
               | *
        (V) | *
               | Insufficient * * * * * <- DC value
               |
               |
               |-----+-----+-----+-----+-----+--------->
               0 Tr 2Tr 3Tr 4Tr 5Tr

                          PULSE WIDTH (ns)

                      Figure 1: Receiver Noise Tolerance
                      ----------------------------------

This is also referred to as dynamic noise immunity curve. To summarize the plot:
- Pulses with widths of 5 rise times (Tr) or more, DC value will causes
  a receiver switch.
- Pulses with widths of less than 5Tr, amplitudes of larger than DC value
  are necessary to cause switch.
- In the region below the curve, the receiver will not switch.
- In the region above the curve, the receiver will switch.

SUGGESTED SPECIFICATION

SUGGESTION A - Combine with Vinl and Vinh
A table of at least five data points should be provided with each Vinl and
with each Vinh. Each point is a pair of time and voltage values in the form
(t, v) where Tr < t < 5Tr. Suggested format is shown below.

Vinl= xx.xx; Table: (tl1, vl1) (tl2, vl2) (tl3, vl3) (tl4, vl4) (tl5, vl5)
Vinh= xx.xx; Table: (th1, vh1) (th2, vh2) (th3, vh3) (th4, vh4) (th5, vh5)

SUGGESTION B - Use separate keyword
Keyword: [Dynamic Noise Immunity]
This keyword defines a table of voltage versus time points. The table
contains three columns:
    1- time
    2- low voltage rise (volts above Ground)
    3- high voltage drop (Volts below Power)

Regards, Ahmed
|---------------------------------------+------------------------------------|
|Ahmed Omer | Advanced Interconnect Systems Labs |
|E-MAIL: omera@trailblazer.sps.mot.com | Semiconductor Products Sector |
| : R28450@email.sps.mot.com | M O T O R O L A, Inc. |
|Phone: 512-933-2247 | 3501 Ed Bluestein Blvd MDrop: F36 |
|Fax: 512-933-5845 | Austin, TX 78721 |
|---------------------------------------+------------------------------------|
Received on Fri Aug 9 16:31:17 1996