IBIS Representation for Branching Conductors

Hello Mike:

     The short answer to your question is yes -- but in not a
great amount of detail. The [Pin Mapping] keyword allows one
to specify which buffers are connected to which power and ground
pin(s) on a package, thereby allowing the user to "create" common
power or ground bus in a package. The power and ground pins
themselves can be given a lumped L/R/C value via the [Pin] keyword.
However, the IBIS description does not allow one to describe the
distributed L/R/C of the power distribution grid itself. For a
detailed network type description of the package one would need to
use a SPICE representation.

              Regards,
              Stephen Peters
              Intel Corp.

>On Fri, 5 Sep 97 16:40:24 CDT Mike Lamson wrote:

From: MIKE LAMSON MIKL
 
Subj: IBIS Representation for Branching Conductors
 
 
An IBIS question:
I have a package that has a power distribution bus over the chip that is
connected to two external pins. The bus also has many points where it is
wire bonded to the chip. There is also a similar ground bus in the same
package. This is a common lead frame design used in DRAM memories. Can
this be readily represented by an IBIS format? A SPICE file can be easily
generated for this. Can this be converted to IBIS?
 
Thanks and regards,
 
Mike Lamson
m-lamson@ti.com
 
 
Received on Mon Sep 8 08:46:15 1997