Question about IBIS 3.2 EBD specification

From: Dodd, Ian <idodd@veribest.com>
Date: Tue Aug 03 1999 - 15:47:56 PDT

Hi,

We have a number of questions regarding the EBD section of the IBIS 3.2
specification.

1. How does one create an EDB [Pin List] for a layout that has multiple
connectors?

The example in the specification seems to assume a single connector:

[Pin List] signal_name
A1 GND
A2 data1
e.t.c.

It seems to us, that it would be logical to extend this to multiple
connectors:

Pin List] signal_name
J1.A1 GND
J1.A2 data1
e.t.c.

J2.B1 data33
J2.B2 data34
e.t.c.

The problem here is that there is an 8 character limitation on the pin name,
which
would include the layout reference designator, the separator and the layout
pin name,
which together would make up the EDB pin name.

2. In order to simulate a signal net, the tool needs to go into the IBIS
model and get the
supply/reference pins. It then needs to find which connector pin is wired to
those pins.
(to figure out what supply voltages are being used)
If the EDB layout has supply traces, I would expect this connectivity to be
shown in
the Path Description section, however what is done to show connectivity
through a
plane? Does the plane need to have an entry in the connectivity section
(possibly with
dummy zero length sections) ?

3 The EBD connectivity section appears to not allow for the description of
traces with loops.
If this is true, does this need to be spelled out.? Is the lack of support
for traces with loops
an issue? (Our PCB CAD system can certainly be forced into creating looped
traces - it will
warn you but it can be done!)

        Thanks
        Ian Dodd

> Ian C Dodd
> Technical Manager, Signal Integrity Products
VeriBest, Inc. Boulder CO USA
EMAIL: idodd@veribest.com
PHONE: (303) 581-2358

  
Received on Tue Aug 3 15:54:17 1999

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