DATE: 10/20/99
SUBJECT: 10/14/99 EIA IBIS Summit Meeting Minutes
VOTING MEMBERS AND 1999 PARTICIPANTS LIST:
Applied Simulation Technology Raj Raghuram, Norio Matsui, Neven Orhanovic,
Fred Ballesteri
Avanti Nikolai Bannov
Cadence Design Mike LaBonte*, Todd Westerhoff*
Cisco Systems Syed Huq
Compaq Bob Haller*, Steve Coe*, Shafir Rahman,
Maher Elasad, Peter LaFlamme*, Doug Burns*
Cypress (Rajesh Manapat)
EMC Corporation Fabrizio Zanella*, Alex Nosovitski*, Shan Haq*
Fairchild Semiconductor [Peter LaFlamme], Craig Klem, Graham Connolly*,
Christian Klein*
H.A.S. Electronics (Haruny Said)
Hewlett Packard (EEsof, etc.) Paul Gregory, Henry Wu
HyperLynx (& Pads Software) Matthew Flora, Kellee Crisafulli, Lynne Green,
John Angulo, Gene Garat*, Robin Edwards*
IBM Greg Edlund*, Michael Cohen, Praven Patel,
Paul Clouser*
Incases Olaf Rethmeier, Werner Rissiek, David Eagles,
Wilhelm Arnoldi, Ulrich Losch
Intel Corporation Stephen Peters*, Arpad Muranyi*, Frank Kern,
Martin Chang, Dave Moxley, Kerry Nelson,
Jeff Day, Richard Mellitz, Peter Liou,
Will Hobbs, Henri Maramis
LSI Logic (Symbios Logic) Scott King
Mentor Graphics Bob Ross*, Mohamed Mahmoud, Sherif Hammad,
Jean Oudinot, Markku Kukkanen, Martin Groeber,
Karine Loudet, Hisham Gamal, Evgeny Wasserman,
Tom Dagostino*, Mohamed Nasef*
Mitsubishi (Tam Cao)
Motorola (Ron Werner)
National Semiconductor Milt Schwartz
North East Systems Associates Edward Sayre*, Michael Baxter, Kathy Breda*,
Ed Sayre III*, Jinhua Chen*
NEC (Hiroshi Matsumoto)
Nortel Networks Martin Hall (& at Viewlogic), Calvin Trowell*
Ross Pryor*
Philips Semiconductor Todd Andersen, Peter Christiaans
Quantic EMC (Mike Ventham)
Siemens Bernhard Unger, Christian Mitschke,
Manfred Maurer, Peter Kaiser, Wolfram Meyer,
Gerald Bannert, Harmut Ibowski, Katja Zuleeg,
Hans Pichlmaier, Eckhard Lenski, Kortheuer Udo,
Christian Sporrer
SiQual Scott McMorrow
Texas Instruments Jean-Claude Perrin, Shankar Balasubramaniah,
Ramzi Ammar, Thomas Fisher
Time Domain Analysis Systems Dima Smolyansky, Steven Corey*
Viewlogic Systems Chris Rokusek, Guy de Burgh*, Cary Mandel,
(Jon Powell)
VeriBest Ian Dodd
Via Technologies (Weber Chuang)
VLSI Technology D.C. Sessions
OTHER PARTICIPANTS IN 1999:
3Com Roy Leventhal*
3Dfx Interactive Ken Wu
Actel Corporation Silvia Montoya
Alcatel Steven Criel
Analytical Edge Robert Easson
Applied Microelectronics Brian Sanderson
BMW Friedrich Haslinger
Bogatin Enterprise Eric Bogatin
Bosch Telecom Detlef Wolf
Celestica Danny Da Silva
Dynamics Research Corporation Mike Walsh*
ECI Telecom Daniel Adar
EIA [Patti Rusher], Cecilia Fleming,
Dan Heinemeier
Electronique Catherine Gross
EFM Consulting Ekkehard Miersch
FCI John Ellis
Foxcomm Jeff Walden*
General DataComm Laurence Michaels*
High Design Technology Razvan Ene
Hitachi ULSI Hideki Fukuda
Infineon Thomas Latzel
Intracon Design Mike Osmond
KAW Shinichi Maeda*
Litton Systems Robert Bremer
Lucent Jason Pritchard*
Matsushita Atsuji Itoh
Molex Incorporated Gus Panella
Newbridge Networks Bruce Carlile*
Oce Printing Systems Ernst Deiringer
Praegitzer Design Rick Newell, Paul Galloway*, Joe Socha*
Rockwell Collins Susan Tweeton, Ron Hau
Rode Consulting Chris Rode*
Samsung Jung-Gun Byun, Cheol-Seung Choi
Shindengen Tsuyoshi Horigome
Signals & Systems Engineering Tom Hawkins*
STMicroelectronics Fabrice Boissieres, Philippe LeFevre
Stratus Keith Vieira*
StorageTek Nick Krull
Sun Microsystems Victor Chang*, Kevin Ko, Greg Fitzgerald*,
Nick LaPlaca*
Tektronix Tom Brinkoetter
Teradyne Mikhail Khusid
VDOL Robert Novosel
Xilinx Susan Wu
(Unaffiliated, Retired) Bruce Wenniger
In the list above, attendees at the meeting are indicated by *. Principal
members or other active members who have not attended are in parentheses.
Participants who no longer are in the organization are in square brackets.
Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as
follows:
Date Bridge Number Reservation # Passcode
October 29, 1999 (916) 356-9200 2-356762 1385866
November 19, 1999 (916) 356-9200 2-356763 7473493
All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out
7 days before each Open Forum and meeting minutes out within 7 days after.
When you call into the meeting, ask for the IBIS Open Forum hosted by Will
Hobbs and give the reservation number and passcode.
NOTE: "AR" = Action Required.
-------------------------------- MINUTES -------------------------------------
IBIS SUMMIT MEETING
The IBIS Summit Meeting was held all day on Thursday, October 14, 1999 at
Marlborough, Massachusetts in the Holiday Inn during the week of the PCB
Conference East. Forty three people representing 24 different organizations
and 12 member companies participated. These minutes capture some of the
discussions that took place. The presentations and other IBIS Summit Meeting
material will be uploaded at:
http://www.eda.org/pub/ibis/summits/oct99/
INTRODUCTIONS AND BUSINESS
Ed Sayre opened the meeting by stating that IBIS has become too complicated
and too detailed. The East coast Users group is PCB Systems oriented, not
just IC buffer oriented. Ed advocated and expansion of IBIS to encompass
both ICs and systems.
Ed then introduced Bob Ross. Bob welcomed the newest member Nortel Networks
raising the membership to 32 companies. He thanked Kathy Breda and the North
East Systems Associates (NESA) staff for handling the local arrangements and
being a co-sponsor. Bob also thanked the other co-sponsors, Cadence Design,
HyperLynx, for the lunch and refreshments and Praegitzer Design for the
afternoon break refreshments.
Bob announced that the next two IBIS Summit Meetings are being planned for
January 31, 2000 at DesignCon2000 in Santa Clara, California, and for
March 31, 2000 at DATE2000 in Paris, France.
Then everybody introduced themselves. Bob noted that the Agenda consisted
of three presentations on several interesting subjects and also several
topics for interactive "roundtable" discussions.
NAVIGATING IBIS AT 3COM
Roy Leventhal, 3Com
Roy Leventhal provided recommendations to make the IBIS specification more
readable, thus more readily adopted by the electronics industry. Also Roy
is using the ISO 9000 methodology to break the IBIS modeling process into
well-defined chunks.
A number of process documents are stored internally on-line at 3Com to explain
IBIS and to initiate the modeling process. According the ISO 9000 process,
an on-line Simulation Model Request Form is used to initiate getting a
simulation model (usually an IBIS model). It lists minimum requirements,
add-ons, verification Levels and other details. The New Component Request
Form informs everyone of the IBIS Standard in order to follow through on
obtaining IBIS models when purchasing new components.
The Carrier Systems IBIS Model Standard clearly explains the IBIS keywords
and tabulates what is required by 3Com and by the IBIS Standard. Mike
LaBonte noted that the signal_name entry is required by IBIS, but not by
3Com - a potential conflict. The Simulation Model Creation and Updating
Process and the is the Simulation Model Verification Process are documented.
Roy indicated that other documents are also provided.
Roy described some of these forms in more detail along with 3Com's process
for obtaining models. Along with the documents, the 3Com internal website
also is used to collect IBIS and signal integrity papers. The signal
integrity process document is being developed. Roy stated that the key
aspect of an ISO 9000 process is to document the steps to be followed.
Fabrizio Zanella asked about revision control. Roy responded that IBIS file
library management is handled by concatenating the later revisions or updates
of a model to the file and incrementing the revision number. Ed Sayre
commented that he sees models with one level of package detail and another
level for buffer detail. Stephen Peters commented that a revision control
system could be implemented. Roy stated that at this time there is no
dynamic process to correct IBIS file errors.
The Carrier Systems IBIS Model Standard document expands and clarifies the
existing standard. It is designed to be more readable by setting minimum
requirements, setting up other parameters as optional or add-ons, grouping
related IBIS parameters into "threads", using tables, notes and white space,
explaining where to get help and more information, explaining methods for
generating data and checking the IBIS file, listing common mistakes, and
explaining verification methods and how to apply approval levels.
The IBIS Model Syntax Guide follows the threads or groupings of the Standard,
sets up parallel tables of properties to the tables in the Standard, parses
out syntax and formulating rules into these tables, and follows each set of
properties with related examples and notes.
As a result, these documents are quite readable and provide useful tutorial
material. Roy showed the sample documents at the Meeting and would like to
have them reviewed. Bob Ross plans to upload the material under
http://www.eda.org/pub/ibis/training/
directory once a preliminary review is done and some 3Com specific material is
removed.
MODEL EXTRACTION BASED ON DIFFERENTIAL TDR
Steven Corey, Time Domain Analysis Systems
In starting the presentation, Steven Corey asked how TDR methods may be used
in developing IBIS models. Steve then presented and overview of TDR methods
extended for differential lines. The even mode impedances and delays are
greater than the corresponding self impedances and delays which in turn are
greater than the corresponding odd mode impedances and delays. Steve showed
two equivalent models for symmetrical coupled lines. One of Steve's main
points is that the model can then be used even when the differential inputs
are not symmetrical.
These techniques could be used for characterizing connectors, package leads,
and board traces. The parameters are compatible with the proposed IBIS
Connector Specification. The open question is whether the technique can be
extended to n conductors. Perhaps a decomposition theorem could be applied,
in spite of limitations regarding distributed networks. Arpad Muranyi
commented later that perhaps conductors could be handled two at a time and
the results superimposed. Steve stated that the process is not so simple.
During the presentation and discussions, a number of other points were
mentioned. A phase shifter is employed in the equipment to assure that the
differential pulses inputs arrive at the same time. Steve showed an example
of an SMA connector extraction where the coupled and uncoupled regions can
be isolated. Steve noted that there are TDR measurement, risetime and
fixturing factors. Up to some frequency, a lumped model serves as well as
a distributed model. Ed Sayre commented that opens, shorts and through
connections could be used. Steve showed impedance profiles overlayed with
measurements.
Arpad asked about decomposing even and odd mode impedances when dealing with
small sections with no defined level regions. Steve responded that the
post processing steps still handle this situation accurately.
Greg Edlund asked about on the virtual ground associated with multi-row
connectors when the paths are of different length. Steve mentioned that
some asymmetry can be dealt with using perturbation theory as an approximation
and departure from TEM theory.
Shinichi Maeda questioned whether the results apply at high frequencies, such
as 20 GHz. Steve commented that the TDR methodology gives the same results
as network analyzer methods.
Ed Sayre emphasized that this work is important when considering the analysis
problem from the systems I/O point of view.
ROUNDTABLE - ACCURACY SPECIFICATION
Bob Haller, Compaq (Leader)
Bob Haller introduced the IBIS Accuracy discussion by defining it as an
attempt to create a document of understanding between model creators
(semiconductor vendors) and model users (semiconductor customers). It is
a consistent quantitative method to document the correlation work performed.
It is not a pass-fail document.
Bob then opened the discussion by starting with some points that have already
been raised. Bob Ross had commented that the document needs a reality check.
So far committee has not applied the document to any real device. One of
the key outputs is the accuracy trailer. By trying it on a real device, new
issues related to the accuracy of the measurements, description of the test
board (versus actual implementation), the completion and clarity of the
trailer document and the described processes themselves will be tested. The
practical issues need to be uncovered in order for the document to be used
by others.
Bob Haller commented that Joe Socha has volunteered to design new revisions
of the accuracy test board and Bob Haller will provide the boards to
interested parties for free. The electronic data base is in Allegro format.
Several people had raised concerns about applying the document to complex
devices such as DRAMS. Arpad Muranyi, Tom Dagostino, and others commented
that they have processes and equipment to do successful hardware extractions.
Stephen Peters stated that a JTAG interface helps the process.
The Accuracy Specification is intended for semiconductor producers. However,
there is advantage to having unbiased third parties doing the testing. Roy
Leventhal commented that compliance with a specification builds confidence
in the models.
Greg Edlund commented on the three levels of correlation and then asked
whether the semiconductor vendors could hand pick accurate corner test parts
for fast and slow cases. Graham Connelly stated that he could get corner
parts within about a 10 percent tolerance. Arpad and Greg also reported the
ability to hand-pick parts. Roy Leventhal commented that the accuracy
specification process would be used to build confidence in the devices.
The Accuracy Specification is intended to validate the model, not the
simulation tool. A reference waveform, perhaps a Spice extraction, could be
included.
Several purposes of IBIS were stated:
Provide simulation models without revealing intellectual property,
Provide models for course simulation,
Provide models which simulation very quickly,
Format data for prototype device development, and
Provide models suitable for transmission line and large signal simulations.
To conclude, Bob Haller noted reinforced that activities for a reality check
were underway. Bob Haller and Peter LaFlamme will retake the data and
generate a trailer for the VCX16244. Greg Edlund plans to work and generate
an I/O buffer Correlation report by DesignCon2000 using the ALVCH16832.
Bob Ross then in showed portions of an internal presentation that discussed
the IBIS Accuracy Specification in order to give an overall perspective of
the document. (These slides will also be uploaded.) Bob briefly mentioned
these points:
Goal (actual measurement versus simulation),
Measurement Specification,
Correlation Definitions,
Documentation (accuracy trailer),
Compare against Model Data,
Compare against Simulations, and
Table Comparison Metrics and Issues.
ROUNDTABLE - INPUT MODELING DISCUSSION
Stephen Peters, Intel (Leader)
Stephen Peters gave a brief presentation on Behavioral Receivers. Stephen
outlined the history of the group and stated that BIRDs 61-63 have been
issued and BIRD64 is still being planned.
BIRD61 Characterizes a receiver based on the theory that the receiver input
delay is dependent on the input overdrive and input edge rate. Tables are
created and the assumption is that the simulator can create a behavioral
model based on this table. However, how to use the table still remains an
open issue. The delay differences could be looked up directly, could be
used to create coefficients to an equation or could be used to tweak and
select a standard model. So far no input model or equation has been
proposed, so we cannot determine what are the table minimum requirements.
Upon questioning, Stephen clarified that the receiver delay table is intended
for an Input buffer, not an output buffer.
Todd Westerhoff indicated that a behavioral abstraction could be done by
breaking the input into behavioral blocks for pulse rejection, gain-bandwidth,
and overdrive. Perhaps the subcircuit capability in IBIS could be used. Tom
Dagostino questioned whether hysteresis inputs was captured with the proposed
tables. Stephen thought it was.
BIRD62 was introduced to deal with enhanced receiver specifications. The
traditional methodology based on Vinh and Vinl values are inadequate because
the limits are too wide, ringback is not considered, and newer technologies
have thresholds base on Vcc. Stephen then gave a synopsis of BIRD62 details
showing how Vth may track Vcc using Vth_sensitivity and how Vth can vary
with process and tolerances using Vth_min and Vth_max.
Todd Westerhoff expressed concern that the new proposal still might have
some ambiguity. For example, the rising input signal could pass through
Vinh_ac, then dip below Vinh_dc and then recover to a level above Vinh_dc.
What is the actual delay? This question also would apply to BIRD61.
A general open issue remains on whether [Model Spec] could still be used.
BIRD63 documents the test loads for setup and hold conditions. The proposal
is similar to BIRD62. Stephen listed two open issues: Are different slew
rates needed, and does Vth = 0 mean differential?
Tom cited the case for ECL where a 0 value threshold may be used for
single ended buffers. Bob Ross advocated a separate keyword.
ROUNDTABLE - IBIS VERSION 4.0 FEATURES DISCUSSION
Bob Ross, Mentor Graphics (Leader)
Bob Ross provided a general outline of some major IBIS Open Forum and IBIS
User Group Activities (some of which may not be currently active) to put
the Version 4.0 in context and to illustrate that we have been focusing on
the first three activities.
Version 3.2 Standards Development
ANSI/EIA-656-A ratification (Done)
IEC 62014-1 (Version 2.1) and IEC 62014-2 (Version 3.2) ratification
IBISCHK3 Development (Done)
Meetings (Teleconference and four Summits) Ongoing
Outside Contacts (EIAJ-IMIC, JEDEC, IEC-EMC)
Accuracy Specification
Connector Specification
Spice to IBIS
Education
Miscellaneous (Cookbook, Model Review, etc.)
Version 4.0 Development
Bob then introduced some general and specific items for consideration for
Version 4.0 more were added during the discussion the lists along with
general priorities (mostly high) and with some regrouping:
High:
Equation Based Modeling
Linkages or Adoption
IMIC
Spice
Nodal Descriptons
Table Spice (IMIC Devices)
Application Programmable Interface (API) - (Prevent More Keywords)
Modularity and System Description
(New Paradigm)
Connectors and Packages
G Matrix
Losses (Skin Effect, Dielectric, Frequency Dependent)
Swath Matrix
Accuracy Specification
Reference Waveforms
Trailer
Low:
Incorporation of Timing
Not Classified:
EMI Extensions (Physical Dimensions, etc.)
Some specific features were also considered for classification:
High:
Input Modeling
BIRDs 61-63
Independent Vmeas for Rising and Falling
Differential over/undershoots
Differential Waveforms, test loads
SSO and Power and Ground Bounce (and Return Currents)
Behavioral Approach
or (BIRD42.3)
C_comp Connected to Vcc, Gnd
Low:
Feedback (This never has been defined.)
Switched Series MOSFET
Not Classified:
100 Point Table Limit
Bob Ross noted that we consider all requests for extensions when they are
proposed. Arpad Muranyi stated that certain small extensions can be dealt
with quickly and plans to make a proposal regarding C_comp.
Arpad also questioned how soon Verison 4.0 would be available. Bob did not
know. Arpad suggested the possibility of holding teleconference meetings
every two weeks. Others proposed the possibility of devoting some entire
meetings to one subject.
PROPOSED IMPROVEMENTS TO THE SPICE TO IBIS TOOL
Mohamed Nasef, Mentor Graphics
Mohamed Nasef discussed described five areas of improvement to the existing
North Carolina State University s2ibis2 version 1.1 tool. Three involved
V-I table extraction improvements, and two involved V-T extraction
improvements. They are:
1. Avoid double counting of V-I tables for 3-state buffers in the clamp
regions. This is accomplished by doing the clamp extraction over the
entire range from -Vcc to 2 Vcc and subtracting this data from the
extracted pull down or pullup tables.
2. Model internal pullup and pulldown terminators. The method to avoid
double counting is used to subtract the total clamp data from the
pull up and pull down extractions. The internal terminators then are
extracted and positioned either in the [Power Clamp] table or the
[Gnd Clamp] table in a manner which avoids double counting of the
clamp information.
3. Optionally extrapolate the clamp table data to the full -Vcc to 2 Vcc
range, if needed when the subtraction causes non-monotonic behavior
because of loss of resolution, by either horizontal extension of the
tables or by linear extrapolation of the tables.
4. Maximize resolution and Spice table extraction accuracy by taking setting
the time step to 1 ps and then taking 100 points over the specified
simulation time range. The current tool takes 50 points and loses
accuracy by not forcing small steps.
5. Use the minimum simulation time for each [Rising Waveform] and [Falling
Waveform] extraction. The s2ibis2 command file can be extended to
allow independent simulation times for each waveform.
During the presentation, Mohamed showed graphs illustrating the need for
these improvements. Mohamed mentioned that these improvements have been
implemented in scripts and not in the public domain s2ibis2 code. Moreover,
Mohamed has tested these using a Mentor Graphics Spice: Eldo, but the scripts
can be used for any Spice. More work is needed to complete the scripts.
Mohamed does not know yet whether these scripts will be made publicly
available.
ROUNDTABLE - SPICE TO IBIS DISCUSSION
Mike LaBonte, Cadence Design (Leader)
Mike LaBonte announced that a SpiTran graphical interface that was discussed
at the June 21, 1999 IBIS Summit Meeting has been uploaded and is now
available under:
http://www.eda.org/pub/ibis/s2ibis/spitran/
A link is being put in from the Free Tools link of the EIA IBIS Open Forum
home page. Refer to index.html for more details. The utility is written
in JAVA to make it platform independent.
Mike then gave a brief summary of the work done since the June 21, 1999 IBIS
Summit meeting. Syed Huq is drafting a project requirements document. The
intent is to finalize the requirements and then ask for bids on the project.
We then need to determine how to fund the project.
Some open questions are:
Will there be a built in GUI?
Will it have more support for IBIS Version 3.2 features, and
Will it be able to support some possible Verison 4.X features?
Mike attached and reviewed a few of the key requirements that are currently
being considered. Mike stressed that two platforms (UNIX and Windows NT)
would need to be supported. HSPICE and Berkeley Spices would be supported.
Some optional features may be listed for a separate bid. Support for other
platforms and Spices is intended, but actual testing would be done by
committee members, not by the contractor.
The requirements also deal with some flexibility related to extrapolation
of tables and selection of number of points. Algorithms are needed for such
selection. Also C_comp extraction is considered as a separate, optional
extension to be bid on separately.
The discussion extended into Spice models for packages. Roy Leventhal
commented as part of a systems oriented approach that both the die and
package models should be portable. Arpad Muranyi suggested the possibility
of a [Package Selector] keyword similar to [Model Selector].
New ideas also include [Series MOSFET] table extractions. However, the tool
would not extract some parts of IBIS Version 3.2 such as bus hold data
directly because such decomposition is very difficult.
FINAL MISCELLANEOUS DISCUSSIONS (Unscheduled)
As part of some additional introductions, Chris Rode talked about interactive
Web based tools. These consist of Interactive magazine articles and of
actual tools. There exists a link for ChipCenter which is supported by
several magazines:
http://www.chipcenter.com/signalintegrity/main.html
Included are on-line articles and some on-line interactive tutorial
utilities.
Chris sees the next generation of Web pages to be more interactive, both for
magazine articles and for training. Chris prepares article for this page and
also is interested in some more IBIS content. Bob Ross would like both
Chris and Roy Leventhal to be involved in the IBIS educational activities.
ROUNDTABLE - FUTURE OF USER GROUP DISCUSSION
Ed Sayre, North East Systems Associates (NESA) (Leader)
Ed Sayre headed up a general concluding discussion that covered a number of
assorted topics. Ed again stressed the users group point of view to go
beyond just the buffer. Several people commented on the difficulty of
finding enough good signal integrity graduates from the universities.
After thanking everyone for contributing, the meeting was concluded.
NEXT MEETING:
The next teleconference meeting will be on Friday, October 29, 1999 from 8:00
AM to 10:00 AM.
==============================================================================
NOTES
IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897
bob_ross@mentor.com
Modeling Engineer, Mentor Graphics
8005 S.W. Boeckman Road, Wilsonville, OR 97070
VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515
sjpeters@ichips.intel.com
Senior Hardware Engineer, Intel Corporation
M/S JF1-209
2111 NE 25th Ave.
Hillsboro, OR 97124-5961
SECRETARY: Guy de Burgh (805) 988-8250, Fax: (805) 988-8259
gdeburgh@viewlogic.com
Senior Manager, Viewlogic Systems
1369 Del Norte Rd.
Camarillo, CA 93010-8437
LIBRARIAN: Jon Powell (805) 988-8250, Fax: (805) 988-8259
jonp@qdt.com
Senior Scientist, Viewlogic Systems
1369 Del Norte Rd.
Camarillo, CA 93010
WEBMASTER: Syed Huq (408) 525-3399, Fax: (408) 526-5504
shuq@cisco.com
Signal Integrity Engineer, Cisco Systems
170 West Tasman Drive
San Jose, CA 95134-1706
POSTMASTER: Matthew Flora (425) 869-2320, Fax: (425) 881-1008
mbflora@hyperlynx.com
Senior Engineer, HyperLynx, Inc.
114715 N.E. 95th Street
Redmond, WA 98052
This meeting was conducted in accordance with the EIA Legal Guides and EIA
Manual of Organization and Procedure.
The following e-mail addresses are used:
ibis-request@eda.org
To join, change, or drop from either the IBIS Open Forum Reflector
(ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org)
or both. State your request.
ibis-info@eda.org
To obtain general information about IBIS, to ask specific questions
for individual response, and to inquire about joining the EIA-IBIS
Open Forum as a full Member.
ibis@eda.org
To send a message to the general IBIS Open Forum Reflector. This
is used mostly for IBIS Standardization business and future IBIS
technical enhancements. Job posting information is not permitted.
ibis-users@eda.org
To send a message to the IBIS Users' Group Reflector. This is
used mostly for IBIS clarification, current modeling issues, and
general user concerns. Job posting information is not permitted.
ibischk-bug@eda.org
To report ibischk2/3 parser bugs. The Bug Report Form Resides on
eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs.
To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt,
/pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt
respectively.
Information on IBIS technical contents, IBIS participants, and actual
IBIS models are available on the IBIS Home page found by selecting the
Electronic Information Group under:
http://www.eia.org/eig/ibis/ibis.htm
Check the pub/ibis directory on eda.org for more information on previous
discussions and results. You can get on via FTP anonymous.
==============================================================================
Received on Wed Oct 20 13:51:06 1999
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