RE: Overclocked driver schedule.

From: <atd@table.jps.net>
Date: Thu Aug 17 2000 - 14:55:27 PDT

On Thu, 17 Aug 2000, Muranyi, Arpad wrote:
> So, if the rise on delay is 3.5ns, and the logic high pulse is less that in
> duration, that means that the t0 time for this scheduled pullup device never
> happened. So it should not even begin to turn on. The pulldown that was
> holding the signal low prior to this rising edge is turned off earlier by
> the rising edge when the signal level goes above Vinl.
>
> Therefore the answer is NO to both 1) and 2).

That one is obvious, but I said the rise on delay was 3.5 PICO seconds,
so it DID turn on since the pulse width was 2 ns. So, it doesn't apply to
the case I asked about.

Given that it did turn on, when should it turn off?

> -----Original Message-----
> What is the correct behavior for a simulator when driver
> schedule is overclocked?
>
> Consider this ....
>
> [Driver Schedule]
> foo 3.5ps 5ns NA NA
>
> .. this gives it an extra kick on a rising edge.
>
> The question ...
>
> What should happen when the device is triggered to fall 3ns
> after the rise begins?
>
> Some possibilities .....
>
> 1. It waits another 2 ns (for the total of 5 ns) to turn
> off?
>
> 2. It turns off on the falling edge? as if the line was:
> foo 3.5ps 5ns 0ns NA
>
> 3. Other?
>
>
> Should the standard be changed to clarify this?

 
Received on Thu Aug 17 14:52:59 2000

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