Re: Clock limitations on IBIS simulation.


Subject: Re: Clock limitations on IBIS simulation.
From: Ingraham, Andrew (Andrew.Ingraham@compaq.com)
Date: Tue Jan 08 2002 - 05:38:43 PST


> At what clock speeds, and yes I mean DDR signals, is IBIS not
> accurate to a intolerable degree ?
>
> I know that the DC sweep analysis is clock independent, and
> that the wave form reflects the actual switching of the pad.
> Therefor, I believe the answer is more tool dependent.
 
I think that it may be more model dependent. Depends on what kind of
device you are modeling. Depends on how well the model's creator did
it.

Many IBIS models have just the simple L-R-C package model representing a
single line. No couplings. Faster edge rates (and therefore clock
speeds) may require a better representation of package parasitics. For
some devices it may make more of a difference than others.

At 1GHz, and for most high pin count IC packages, I would consider the
simple L-R-C model to be inadequate. You do get into some tool
dependencies here, as well: does the tool treat it as a distributed
model? Lumped PI-model? L-model? T-model? Lossy delay? Are any of
these appropriate for your particular device?

Regards,
Andy



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