RE: [IBIS] Test load reference voltages


Subject: RE: [IBIS] Test load reference voltages
From: Peters, Stephen (stephen.peters@intel.com)
Date: Mon Oct 21 2002 - 12:32:47 PDT


Hi Steven:

  Yes, it does make sense to vary Vref with the supply voltage. And, in the
recently passed version 4.0, the [Model Spec] keyword has been enhanced to
include min, typ and max values for Vref.

  Regards,
  Stephen Peters
  Intel Corp.

-----Original Message-----
From: Steven_McKinney@dell.com [mailto:Steven_McKinney@dell.com]
Sent: Monday, October 21, 2002 12:16 PM
To: ibis@eda.org
Subject: [IBIS] Test load reference voltages

All,

A quick question on Vref. It appears that the IBIS spec allows only a
single voltage for a reference voltage. Is it customary for those who
create the IBIS models to vary the supply voltage to obtain the V-I curves
for fast, typ., slow modes but keep the Vref the same during all of these
cases? It would make sense that the Vref would change with the supply since
in the physical world, that voltage would be supplied by the same rail
through some resistor network.

Thanks for any feedback on this!

Steven McKinney
Signal Integrity Engineering Group
Dell Computer Corp.

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