Subject: RE: [IBIS] IBIS models for Intel LXT971A and LXT9785 Ethernet PHYs
From: Muranyi, Arpad (arpad.muranyi@intel.com)
Date: Tue Feb 11 2003 - 09:30:32 PST
Brad,
The difference between IBIS analog, and analog-analog is that
in IBIS the buffer is either in the high state, low state or
high impedance state. This means that the pullup, or pulldown
are fully on or off (except during transitions). In real
analog, you have a transistor that is biased to a certain
operating point, and then the signal sits on top of that bias
level. The signal can't be larger than the bias, otherwise
it will get clipped. Think of digital buffers as if they
were analog amplifiers which get turned on/off by the signal,
or which have signals that is the bias itself.
The reason IBIS can't do it (yet) is because we made several
assumptions for how the buffer is constructed so that we can
have simple IV and Vt curves in the IBIS file, and this
limitation was part of one of the assumptions. In the days
when we started IBIS there was no real need for covering real
analog signals with IBIS because there were practically no
boards that had true analog signals on them. This is changing
and that's where the recently approved BIRD75 will help.
And you are right, IBIS simulations are actually analog, not
digital, but as I stated above, what makes these buffers "digital"
is how they are operated. You could probably make an open loop
amplifier out of a 74244 buffer if you put a small sine wave
on its input with a DC bias of Vcc/2. In theory, (if you are
lucky), the output should give you an amplified sine wave around
Vcc/2. I never tried this, but I can imagine that it could work.
Can anyone on the list share some "experience" in this area?
Have fun...
Arpad
==============================================================
-----Original Message-----
From: Tom Dagostino [mailto:tom@teraspeed.com]
Sent: Tuesday, February 11, 2003 8:46 AM
To: 'Brad Crowell'; 'Hassan Ali'; ibis@eda.org
Subject: RE: [IBIS] IBIS models for Intel LXT971A and LXT9785 Ethernet
PHYs
Brad
In this case the driver is more analog than most. I believe it has 3 levels.
IBIS 4.0 and prior was set up for full swing signals and cannot model intermediate levels. With the inclusion of BIRD 75 you should be able to model and simulate these signals.
Tom Dagostino
Teraspeed Consulting Group LLC Teraspeed Consulting Group LLC
2926 SE Yamhill St. Device Modeling Division
Portland, OR 97214 13610 SW Harness Lane
Beaverton, OR 97008
http://www.teraspeed.com 503-430-1065
tom@teraspeed.com
-----Original Message-----
From: Brad Crowell [mailto:brad.crowell@amirix.com]
Sent: Tuesday, February 11, 2003 5:14 AM
To: tom@teraspeed.com; 'Hassan Ali'; ibis@eda.org
Subject: RE: [IBIS] IBIS models for Intel LXT971A and LXT9785 Ethernet
PHYs
Your reply brought a couple of questions to mind. First, with a little tongue in cheek, aren't all IO analog in nature, which is the point of IBIS? Second, more seriously, why can't IBIS be used to model these types of IO? I have come across this probelm several times myself. With only an IBIS simulator at my disposal for these types of problems, I don't have HSpice and if I did it's doubtful that I could get the needed models, this leaves me no means of simulating these cases.
Brad
****************************
Brad Crowell, P. Eng.
Senior Hardware Designer
AMIRIX Systems
Phone: 902-450-1700 Ext 287
Fax: 902-450-1704
www.amirix.com
****************************
-----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org]
Sent: February 10, 2003 5:29 PM
To: 'Hassan Ali'; ibis@eda.org
Subject: RE: [IBIS] IBIS models for Intel LXT971A and LXT9785 Ethernet PHYs
I believe you will find that these pins are really analog in nature not digital. Thus no IBIS models for them.
Tom Dagostino
Teraspeed Consulting Group LLC Teraspeed Consulting Group LLC
2926 SE Yamhill St. Device Modeling Division
Portland, OR 97214 13610 SW Harness Lane
Beaverton, OR 97008
http://www.teraspeed.com 503-430-1065
tom@teraspeed.com
-----Original Message-----
From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org]On Behalf Of Hassan Ali
Sent: Monday, February 10, 2003 12:50 PM
To: ibis@server.eda.org
Subject: [IBIS] IBIS models for Intel LXT971A and LXT9785 Ethernet PHYs
I've obtained IBIS models "lxt971a_q_mii_3_31.ibs" and "lxt9785_q_rmii_3_3.ibs" of the above-mentioned devices through the following link:
http://www.intel.com/design/network/products/ethernet/linecard_ept.htm
Unfortunately the IBIS model for LXT9785 device does not show which I/O models should be used for the 100Mbps pins: TPFOP, TPFON, TPFIP, TPFIN. The IBIS model for LXT971A does not show the I/O models for the TPFOP, TPFON pins.
I need the models for those pins to be able to perform signal integrity analysis of a magneticless link through a backplane.
Does anyone have info on the missing models? Are those the right IBIS model files for my analysis?
Thanks.
Hassan.
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