[IBIS] Mentor Graphics Announces Support for Intel's IBIS 4.1 AMS Signal Integrity Models

From: Abdulrahman Rafiq <arafiq_at_.....>
Date: Wed Feb 08 2006 - 08:22:17 PST
Published by EDACafe.com on 2/7/06, text of article below. 
http://www10.edacafe.com/nbc/articles/view_article.php?section=CorpNews
<http://www10.edacafe.com/nbc/articles/view_article.php?section=CorpNews&art
icleid=241206> &articleid=241206
 
Mentor Graphics Announces Support for Intel's IBIS 4.1 AMS Signal Integrity
Models


WILSONVILLE, Ore.-(BUSINESS WIRE)-Feb. 7, 2006- Mentor Graphics Corporation
(Nasdaq:
<http://www10.edacafe.com/goto.php?http://finance.yahoo.com/q?d=t&s=MENT>
MENT), the market and technology leader in printed circuit board (PCB)
design solutions, today announced the release of the ICX(R) and ICX Pro(TM)
Signal Integrity Design Kits for Intel's next generation I/O controller hub.
This kit is the first to utilize Intel's new IBIS 4.1 and IEEE 1076.1
standard VHDL-AMS (
<http://www10.edacafe.com/goto.php?http://www.eigroup.org/ibis/>
http://www.eigroup.org/ibis/) models. These analog/mixed-signal (AMS) models
have been developed by Intel for the I/O controller hub portion of their
next generation chipset, codenamed "Broadwater." These AMS signal integrity
(SI) models also provide significant speed and accuracy benefits over
traditional SPICE and IBIS modeling techniques. And being wrapped in IBIS
syntax, these new models are as easy to import and use as traditional IBIS
models. 

"Mentor Graphics is pleased to support these new IBIS 4.1 AMS models from
Intel," said Henry Potts, vice president and general manager, Systems Design
Division, Mentor Graphics. "We are committed to open industry standards,
such as IBIS 4.1 and IEEE 1076.1 VHDL-AMS, and believe that they provide the
flexibility and standardization required to cover modeling requirements now
and into the future." 

Traditional IBIS constructs cannot accurately model today's advanced I/O
buffers. As a result, many designers and engineers of PCBs performing SI
analysis are forced to use complex transistor-level SPICE models. These
models run slowly, often suffer convergence problems, and are typically
distributed in a proprietary format. On the other hand, the IBIS 4.1 AMS
models offer the benefit of superior performance and improved accuracy, with
no convergence issues, in an IEEE standard format. 

"Intel is pleased to support the new IBIS 4.1 standard for signal integrity
modeling by providing IBIS 4.1 AMS models," stated Greg Crain, application
engineering director of Intel's Business Client Group. "We are confident our
customers will find the increased speed, accuracy, and flexibility of the
IBIS 4.1 AMS models to be a significant benefit in their high-speed PCB
design process." 

The Mentor ICX and ICX Pro kits for Intel's next generation I/O controller
hub includes a complete IBIS model for the I/O controller hub, including AMS
models for the PCI Express, Serial ATA and USB2 interfaces, as well as
IBIS-formatted S-parameter models for the package pins and connectors, and
traditional IBIS models for the other lower-speed interfaces. The ICX kit
also includes a custom menu for configuring device and test conditions, and
a complete reference design layout for Intel's next generation chipset
imported into the tool ready for SI analysis. The next generation I/O
controller hub high-speed receiver models also include a novel application
of AMS which measures and plots eye-opening values in real-time while the
simulation is in progress. 

The ICX and ICX Pro design kits is are available through Mentor and its
local sales force. Customers can contact Mentor Graphics Corporation at
designkit_info@mentor.com for more information. The Intel IBIS models and
reference designs are available through Intel. Customers can contact their
local Intel sales office for more information. 

About ICX and ICX Pro 

Mentor Graphics' ICX solution combines the electrical and physical aspects
of a design, providing an integrated design and verification environment for
signal integrity and timing analysis during layout. This environment uses
true electrical rules to drive the placement and routing, as well as
verification, of high-speed boards, ensuring electrically-correct designs
the first time. ICX Pro Explorer provides a schematic-based what-if signal
integrity environment, with extensive capabilities for pre-layout
simulation, including sweeps. Both solutions are built using the ICX
simulation technology. Through its support of IBIS 4.1, this simulation
environment provides the ability to mix and match models of various formats
(IBIS, SPICE, AMS). This gives designers and engineers the ultimate
flexibility in terms of model support. 

About Mentor Graphics 

Mentor Graphics Corporation (Nasdaq:
<http://www10.edacafe.com/goto.php?http://finance.yahoo.com/q?d=t&s=MENT>
MENT) is a world leader in electronic hardware and software design
solutions, providing products, consulting services and award-winning support
for the world's most successful electronics and semiconductor companies.
Established in 1981, the company reported revenues over the last 12 months
of about $700 million and employs approximately 4000 people worldwide.
Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville,
Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder
Park Drive, San Jose, California 95131-2314. World Wide Web site:
<http://www10.edacafe.com/goto.php?http://www.mentor.com/>
http://www.mentor.com/. 

Mentor Graphics and ICX are registered trademarks and ICX Pro is a trademark
of Mentor Graphics Corporation. Intel is a trademark or registered trademark
of Intel Corporation or its subsidiaries in the United States and other
countries. All other company or product names are the registered trademarks
or trademarks of their respective owners. 


  _____  


Contact: 

Mentor Graphics

Debra Layton, 720-494-1043

 
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for%20Intel%27s%20IBIS%204.1%20AMS%20Signal%20Integrity%20Models&attach=no&a
rticle=yes&articleid=241206> Email Contact

Suzanne Graham, 503-685-7789

 
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---
Abdulrahman Rafiq 
(Hardware/IO Interconnect Modeling Engineer)
ASIPD/SIPD/ISBU/DSSTG/Cisco Systems, Inc
Phone  : +1-408-527-5540
Fax      : +1-408-526-6603
Pager   : +1-888-646-7881
Email    : arafiq@cisco.com 
Epage   : arafiq@epage.cisco.com 
GrpURL : http://wwwin-sipd.cisco.cm <http://wwwin-sipd.cisco.cm/>  
RefURL  : http://www.eigroup.org/ibis/
 


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Received on Wed Feb 8 09:49:29 2006

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