[IBIS] RE: [IBIS-Users] How to include Differential and Normal IO's of same pins

From: Lynne D. Green <lgreen22_at_.....>
Date: Thu Apr 06 2006 - 10:00:38 PDT
Hello, Kiran Kumar,
 
Here is an example using the same IBIS buffer for both differential and
non-differential buffers. If the buffer is fully symmetric (same edge rate,
edge delay, etc.), then one can (should) use the same model for both sides
of the diff I/O.  This also removes the need to set two model selectors for
one diff pair.
 
Also, since tdelay_typ defaults to 0nsec, I would recommend setting it
explicitly to that value. 
 
[Pin]     signal_name      model_name              R_pin        L_pin
C_pin
|
Pin1         CLKP             io1
Pin2         CLKN            io1
Pin3         Single              io1
|
[Diff_pin]       inv_pin         vdiff       tdelay_typ     tdelay_min
tdelay_max
|
Pin1             Pin2            200mV      0.0n              NA
NA
|
 
Best regards,
Lynne
 
 
"IBIS training when you need it, where you need it."
 
Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com
 
 


________________________________

	From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of seshadri.kirankumar@wipro.com
	Sent: Thursday, April 06, 2006 6:10 AM
	To: ibis@eda.org; ibis-users@eda.org
	Subject: [IBIS-Users] How to include Differential and Normal IO's of
same pins 
	
	

	Hi Experts,

	 

	          I have a doubt regarding IBIS model of incorporating
Differential and Non-differential Buffers in the same IBIS file

	 

	As an Example there are 2 pins and corresponding LVDS definition is
as follows

	[Pin]     signal_name      model_name              R_pin
L_pin         C_pin

	|

	Pin1         CLKP             LVDS_1

	Pin2         CLKN             LVDS_2

	|

	[Diff_pin]       inv_pin         vdiff       tdelay_typ
tdelay_min     tdelay_max

	|

	Pin1             Pin2            200mV      NA              NA
NA

	 

	For  the same 2 above pins there exist normal(Non differential) IO's
too,  my doubt is that will it be possible to include both Differential and
Normal IO's with any IBIS mechanism like how a {Model Selector] chooses
different models for the same pin? If so please let me know on how?

	    

	    Suppose same if I do using [Model Selector] then what will be
the impact of [Diff_pin] section on this pins when I am using only Normal
models, this prototype is as listed below

	[Pin]     signal_name      model_name              R_pin
L_pin         C_pin

	|

	Pin1         CLKP             MODEL_1

	Pin2         CLKN             MODEL_2

	|

	[Diff_pin]       inv_pin         vdiff       tdelay_typ
tdelay_min     tdelay_max

	|

	Pin1             Pin2            200mV      NA              NA
NA

	|

	[Model Selector]     MODEL_1

	LVDS_1                     lvds model 

	BUFFER_1                 normal output buffer

	|

	[Model Selector]     MODEL_2

	LVDS_2                     lvds model 

	BUFFER_2                 normal output buffer

	|

	What my opinion is option 2 is not proper as there is still
valid(uncommented) [Diff_pin]  section exist for the same pins while using
normal IO's mode, please correct me if my concept is wrong

	 

	Any Help on this is appreciable 

	 

	Thanks & Best Regards

	Kiran Kumar

	 

	 

	 

	 

	 

	 

	 

	 

	 

	
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Received on Thu Apr 6 10:00:26 2006

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