[IBIS] Agenda, IBIS Summit at DesignCon for Feb. 1, 2007

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                   AGENDA, IBIS SUMMIT MEETING
                   Thursday, February 1, 2007

                  Santa Clara Convention Center
                     Santa Clara, California

             Room: Cypress Room, Hyatt Regency Hotel
                   (formerly the Westin Hotel)

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8:00 AM     Refreshments & Sign In

8:30 AM     Official Opening
            - Welcome to Summit
            - Introductions
            - Opens for Issues, Discussion Topics

8:45 AM     IBIS Chair's Report and Roadmap
            Michael Mirmak, Intel Corporation
   
9:00 AM     Study of IBIS Waveform Time Offsets
            Mike LaBonte, Cisco Systems

9:30 AM     Initial Time Delay Issue in IBIS VT Curves
            Lance Wang, Cadence Design Systems

10:00 AM    BREAK

10:15 AM    IBIS Quality Committee Report
            Kim Helliwell, LSI Logic

10:45 AM    X
            Bob Ross, Teraspeed Consulting Group

11:00 AM    Adaptive DFE Modeling using IBISv4.2/VHDL-AMS
            Luis Boluna, Ehsan Kabir, Susmita Mutsuddy and
            AbdulRahman Rafiq, Cisco systems

11:30 AM    Statistical Eye Algorithm Implementation in VHDL-AMS
            Arpad Muranyi, Intel Corporation

12:00 PM    LUNCH - (Hosted by Cisco Systems)
            Pre-registration required

1:00 PM     IBIS Modeling of USB Buffers
            Sudarshan Honnudike, NXP Semiconductors

1:40 PM     Opens/Discussions
            New Topics, Ad-Hoc Presentations

2:00 PM     IBIS Advanced Technology Modeling Group (IBIS-ATM)
            Status Report
            Todd Westerhoff, Signal Integrity Software (SiSoft)

2:30 PM     Concluding Items
            - Next Open Forum Meeting: February 16, 2007
            - DATE 2007: April 19, 2007, Nice, France

2:45 PM     BREAK, End of IBIS Summit Meeting

3:00 PM     Open Discussion on ATM Proposals
            (You are welcome to stay or leave at any time)

7:00 PM     End of Meeting Room Availability

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REGISTRATION INFORMATION

People involved in IBIS Model development, EDA tool development, and
digital circuit design are invited to participate to the Summit 
meeting. If you plan to participate, please register with the 
information below:

   Name:
   E-mail address:
   Company:
   Telephone:

Send to:

   Syed Huq (shuq@cisco.com)

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Sponsors:   DesignCon, Cisco Systems

DesignCon:  January 29 - February 1, 2007
Santa Clara Convention Center
Santa Clara, California
See <http://www.designcon.com/> for more information.


LIST OF NEARBY HOTELS

  See <http://www.designcon.com/conference/hotel_8_travel.html> for
travel directions, hotels and other information.

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