RE: [IBIS] How we can model startup time in IBIS.

From: Akhilesh CHANDRA <akhilesh.chandra_at_.....>
Date: Mon May 14 2007 - 22:52:48 PDT
Hello Cary,

  Thanx for your reply. My design is differential. Your point highlighted
help me to correct my models.

Regards
Akhileh 

-----Original Message-----
From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On Behalf
Of Mandel, Cary
Sent: Monday, May 14, 2007 5:08 PM
To: Akhilesh CHANDRA; Itzhak Peleg; ibis@server.eda-stds.org
Subject: RE: [IBIS] How we can model startup time in IBIS.

Hello Akhilesh,

There are two basic kinds of mismatch that you can have between spice and
IBIS simulation.

1) Waveforms are shifted in time, but shape of rising/falling edges match.
In this case, the IBIS simulator is probably doing the right thing -- it is
not the job of the IBIS model to model this "startup time". 

2) Mismatch between the rising/falling edges in Spice as compared to the
IBIS simulator. You need to be careful when removing lead time in VT curves.
In many IBIS models, the relative delay between different VT curves is very
important. The safest thing to do is to remove the SAME lead time from all
curves for a particular driver model. This is the safest thing to do.
Optionally, there is a  refinement to this, which
is: a) For single ended models -- Remove the same lead time from all RISING
waveforms. Remove the same lead time for all FALLING waveforms;
b) For differential models --  The relative timing between RISING and
FALLING waveforms is important, so you should remove the same lead time for
all the RISING and FALLING waveforms.

Cary Mandel
Applications Engineer
Mentor Graphics

-----Original Message-----
From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On Behalf
Of Akhilesh CHANDRA
Sent: 14 May 2007 11:42
To: 'Itzhak Peleg'; ibis@server.eda-stds.org
Cc: Akhilesh CHANDRA
Subject: RE: [IBIS] How we can model startup time in IBIS.

Hello Itzik,

If I remove it from my VT table then I can run the design at 800MHZ but then
I have mismatch in IBIS and spice results. In this case my spice have 3ns
startup time but it's missing in IBIS models.

Regards
Akhilesh 

-----Original Message-----
From: Itzhak Peleg [mailto:itzikpe@marvell.com]
Sent: Monday, May 14, 2007 3:44 PM
To: Akhilesh CHANDRA; ibis@eda-stds.org
Subject: RE: [IBIS] How we can model startup time in IBIS.

Hi Akhliesh

You can you remove the same lead time in all curves.
For example removing 3ns from each curve subtracting the new 1st time point
from each time point (so the curve will start at 0ns time). Then write the
curves to the IBIS model.

--
Regards
 
Itzik Peleg
Board Technology Group
 
Marvell Semiconductor Israel Ltd
6 Hamada Street
Mordot HaCarmel Industrial Park
Yokneam 20692, ISRAEL
 
Email - itzikpe@marvell.com
Tel   - +972 4  9091192
Cell  - +972 54 4452482
Fax   - +972 4  9091501
WWW Page: http://www.marvell.com
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-----Original Message-----
From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On Behalf
Of Akhilesh CHANDRA
Sent: Monday, May 14, 2007 12:18 PM
To: ibis@server.eda-stds.org
Cc: Akhilesh CHANDRA
Subject: [IBIS] How we can model startup time in IBIS.

 

Hello Experts,

  I am doing IBIS model of an IO operating at 800MHZ frequency. It have
startup time of 3nsec. After 3ns design gives output of 800mhz frequency. If
I model this time in waveform database of IBIS models the I have over
clocking issue and design is not work at this high frequency. Can you help
me to model this startup time. Is anyone make IBIS model of such designs.

Regards
Akhilesh


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Received on Mon May 14 22:53:47 2007

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