RE: [IBIS-Users] RE: [IBIS] Open drain load conditions

From: Fabio BRINA <fabio.brina_at_.....>
Date: Fri Dec 07 2007 - 02:28:49 PST
Thank you Tom 
for your explanation. 

Could you confirm the follow conclusion about V-T load?
In I/O driver  4  V-T waveform are recommended:

1- Rising waveform with Vref= 0 (or Vhigh) with series resistor 50ohm (typically)
2- Rising waveform with Vref=Vdd (or Vhigh) with series resistor 50ohm (typically)
3- Falling waveform with Vref=Vdd (or Vhigh) with series resistor 50ohm (typically)
4- Falling waveform with  Vref= 0 (or Vhigh) with series resistor 50ohm (typically)

In Open drain driver we can consider only the 2 V-T follow:

2- Rising waveform with Vref=Vdd (or Vhigh) with series resistor 50ohm (typically)
3- Falling waveform with Vref=Vdd (or Vhigh) with series resistor 50ohm (typically)
 
Are you agree ?  (obviouslly is a simplify modeleling)

Many thanks,
Fabio



-----Original Message-----
From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Tom Dagostino
Sent: Wednesday, December 05, 2007 6:37 PM
To: 'Fabio BRINA'; ibis@server.eda-stds.org; ibis-users@server.eda.org
Subject: [IBIS-Users] RE: [IBIS] Open drain load conditions

Fabio

An open drain or open sink driver has only a pulldown output FET.  Assuming it is operated between ground and a positive supply voltage it can only sink current from the load, not supply current to an external load.  Thus the load needs to be terminated to a positive supply voltage.  Most of the time this is the Vdd for the device but sometimes the pullup resistor can be terminated to Vdd/2 or some other voltage higher or lower than Vdd.

A very common mistake in setting up this kind of driver in an IBIS model is to use a Vref of 0.00V.  This will give an IBIS parser warning about the driver not being able to drive through Vmeas.  Vref should be the termination voltage the load is connected to as used in the extraction of the VT waveforms.

If the driver has an internal pullup resistor like you find in most CML drivers you still need to use an external load terminated to the appropriate voltage for the VT extractions.  When extracting the IV characteristics you always remove any external load.  In the case of an internal pullup resistor that characteristic should belong in the power clamp table, not in the pullup table.

Regards,

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com 

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

-----Original Message-----
From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On Behalf Of Fabio BRINA
Sent: Wednesday, December 05, 2007 9:07 AM
To: ibis@server.eda-stds.org; ibis-users@server.eda.org
Subject: [IBIS] Open drain load conditions


Hi ibis experts,

I need some explanation about "Open drain" model type:

In this case, which are the load conditions recommended for V-T waveform?

Have I to introduce R_fixture between Pin and Power to extract V-T?
have I to remove it when I consider Pull up waveform?

Thank you,

Best Regards,
Fabio Brina


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Received on Fri Dec 7 02:29:34 2007

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