RE: [IBIS] RE: IBIS model behaviour between Vinh and Vinl input

From: Akhilesh CHANDRA <akhilesh.chandra_at_.....>
Date: Thu Jan 03 2008 - 21:45:28 PST
Hello Arped, 

    Thanx for your reply. In the design spec output can't switch between
vinh and vinl values. And we run simulation with spice then design behave
same way and give smooth transition as the device does. I am using ELDO as
simulator to run the IBIS simulation it show horizontal line (other
simulator show different result) between vinh and vinl values it shows
mismatch between IBIS and spice behavior. Do you think the behavior of
simulator is correct.

   In my view we will need to define IBIS behavior between vinh and vinl
values otherwise each EDA vendor do it by his own algorithm and it create
confusion at the application end.

Regards
Akhilesh

-----Original Message-----
From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On Behalf
Of Muranyi, Arpad
Sent: Thursday, January 03, 2008 9:47 PM
To: ibis@server.eda-stds.org; owner-ibis-users@server.eda.org;
ibis-users@server.eda.org
Subject: [IBIS] RE: IBIS model behaviour between Vinh and Vinl input

Akilesh,

A SPICE model does what the device does (more or less).

An IBIS model's Vinh and Vinl does what the input specification tells you
when you look at a SPICE waveform and try to decide whether the waveform you
got was good enough to consider logic high or logic low.  IBIS does not
describe how the device behaves between Vinh and Vinl.

Arpad
================================================================= 

-----Original Message-----
From: Akhilesh CHANDRA [mailto:akhilesh.chandra@st.com]
Sent: Thursday, January 03, 2008 4:22 AM
To: ibis@server.eda-stds.org; Muranyi, Arpad;
owner-ibis-users@server.eda.org; ibis-users@server.eda.org
Cc: 'akhilesh chandra'
Subject: IBIS model behaviour between Vinh and Vinl input


 


 Hello Experts,

   I am using IBIS model of hysterics cell. In my model Vinh and Vinl
have
different values as per design specs. When I run it with one of the
simulator then it show output at constant voltage(VDDE/2) between Vinh
and
vinl inputs, while spice show continuous behavior with same simulator so
there is big mismatch between IBIS and spice result.
   Can anyone explain us what IBIS standard say about output behavior
between Vinh and Vinl input values.

Regards
Akhilesh



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Received on Thu Jan 3 21:45:50 2008

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