[IBIS] Clarification of Metrics in qualifing an LVDS buffer.

From: Muniswara Reddy Vorugu <Muniswarareddy.Vorugu_at_.....>
Date: Wed Mar 19 2008 - 06:01:34 PDT
Hi,

I am qualifying an LVDS buffer,

Added to syntax check ( ibischk4) and visual check (hyperlynx) I am
doing the following experiment in H-spice

 

For qualifying the transmitter at system level, I am following the
following set-up

 

 (+ve)   Tx_padP    <========> txline(Z0=50) <===========> |

 
R = 100   (Resistor termination)

  (-ve)   Tx_padN    <========> txline(Z0=50) <===========> |

 

Total round trip delay of Transmission line is 240ps   and a square wave
of 5 ns pulse width is transmitted  

 

With this kind of set-up I am qualifying model I against the extracted
spice netlist.

 

What is the best qualifying parameter? 

Is verifying against       Differential mode voltage  {   (  V( padN)  -
V( padP ) ) / 2  }     sufficient

Or 

need to look at              Common mode Voltage {   (  V( padN)  +  V(
padP ) ) / 2  }

Or 

Matching both the signal

 

The correlation that I am getting is as shown in figure. Can you make a
comment on the quality and the correlation of the model? 

 

 

Thank you,

Muniswara Reddy . V

Design engineer, PIPD-IO group,

Bangalore.

 


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Received on Wed Mar 19 06:03:45 2008

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