Re: [IBIS-Users] Re: [IBIS] Different PMOS and NMOS driver impedence

From: Chetana Raghuwanshi <chetana.raghuwanshi_at_.....>
Date: Mon Aug 18 2008 - 06:51:13 PDT
Hi Sudarshan,

You are right. My concern is IV VT mismatch error.
How would it disappear by increasing the simulation time ?

Best Regards
Chetana

--------------------------------------------------------
Chetana Raghuwanshi
CTO / Process & Library Technology
NXP Semiconductors India
NXP Block C, 4th Floor
MFAR Manyata Tech Park
Nagavara, Bangalore-560045
Tel : +91 80 4024 7072
--------------------------------------------------------


                                                                       
                                                                       
                                                                       
                                                                        To
                                       "Chetana Raghuwanshi"           
                                       <chetana.raghuwanshi@nxp.com>   
     "Sudarshan H N"                                                    cc
     <hn.sudarshan@gmail.com>          ibis-users@server.eda.org,      
     Sent by:                          ibis@server.eda.org             
                                                                   Subject
     owner-ibis-users@server.e         [IBIS-Users] Re: [IBIS] Different
     da.org                            PMOS and NMOS driver impedence  
                                                                       
                                                                       
     2008-08-18 06:43 PM                                               
                                                                       
                                                                       
                                                                       




Hello Chetana,

You can use any of the 2 values for Rfixture to generate Vt curves. There
is no rule that , your Rfixture should match to the PMOS or NMOS driver
resistance. But you should always use one value to generate the one set of
rising and falling waveforms(experts, correct me if i am wrong). If you are
seeing any errors with respect to IV and Vt curve mismatch , just simulate
for more time so that it will reach the saturation.

Regards
Sudarshan

On Mon, Aug 18, 2008 at 6:37 PM, Chetana Raghuwanshi <
chetana.raghuwanshi@nxp.com> wrote:
  Hello Experts,

  One of my IO cell has a buffer with different PMOS and NMOS impedences.
  PMOS impedence is approx 200 Ohms and that for NMOS is 96 Ohms.
  In this case what should be the value of Rfixture for calculating IV VT
  curves ?
  Would it be Rfixture1 for calculating pull down and falling waveforms and
  Rfixture2 for calculating pull up and rising waveforms ?
  If I do rise/pullup and fall/pulldown simulations with different Rfixture
  values, is it acceptable ?

  Best Regards
  Chetana


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Received on Mon Aug 18 06:48:19 2008

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