[IBIS] Asian IBIS Summit (Japan) - Agenda

From: Bob Ross <bob_at_.....>
Date: Wed Oct 28 2009 - 11:22:04 PDT
To All:

Below is the planned meeting agenda.  We are sending it out earlier
than usual to publicize the program with 10 presentations and to
encourage registration for refreshements planning.

To register send the information below:

      Name:
      E-mail address:

      Company:
      Top-level Web Link:

      Country:
      Telephone:

    Send to BOTH:

      Bob ROSS, Teraspeed Consulting Group    bob@teraspeed.com
      Kazuyoshi SHOJI, Hitachi ULSI Systems   kazuyoshi.shohji.aj@hitachi.com

Bob

------------------------------------------------------------------

                S U M M I T   I N F O R M A T I O N

Time/Date:  14:00 - 18:00, Friday November 6, 2009

Location:   JEITA Headquarters (New Location)
             Chiyoda First Bldg. South Wing, 3-2-1
             Nishi-Kanda, Chiyoda-ku
             Tokyo, 101-0065
             JAPAN

             http://www.jeita.or.jp/english/about/location/index.htm

Registration:  FREE, send to both addresses below:

      Name:
      E-mail address:

      Company:
      Top-level Web Link:

      Country:
      Telephone:

    Bob ROSS, Teraspeed Consulting Group    bob@teraspeed.com
    Kazuyoshi SHOJI, Hitachi ULSI Systems   kazuyoshi.shohji.aj@hitachi.com

Organizational Sponsors:
             Japan Electronics and Information Technology Industries
                Association (JEITA)
             IBIS Open Forum

Co-Sponsors: (in alphabetical order)
             ATE Service Corporation (Sigrity)
             Cadence
             Zuken

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           I B I S  S U M M I T  M E E T I N G  A G E N D A


13:30   SIGN IN
           - Vendor Tables Open

14:00   Meeting Welcome
           Watanabe, Takashi (NEC Electronics Corp. and JEITA, Japan)
           Ross, Bob (Teraspeed Consulting Group, USA)

14:10   Recent IBIS Activities
           Ross, Bob (Teraspeed Consulting Group, USA)

14:20   Japan IBIS Update 2009
           Shoji, Kazuyoshi (Hitachi ULSI Systems, Japan)

14:30   Guidance of Passive EDA Models
           Ikeda, Hiroaki (Japan Aviation Electronics Industry, Japan)

14:50   Sparse Matrix Mapping in Future Touchstone 2.1
           Ross, Bob (Teraspeed Consulting Group, USA)

15:10   BREAK (Vendor Tables)

15:30   IBIS Quality Review: A Status Review of the IBIS Quality
         Specification
           Ekholm, Anders* and LaBonte, Mike** (*Ericsson, Sweden and
           ** Cisco Systems, USA)

15:50   JEITA IBIS Quality WG Update
           Hamaji, Yoshiro (Toshiba, Japan)

16:10   C-comp Extraction Methods for High-Speed I/O Buffers
           Wang, Lance (IO Methodology, USA)

16:30   Subckt Package Model in IBIS
           Dai, WenLiang (Cadence Design Systems, China)

16:50   An Application of Model Connection Protocols for Power Delivery
         Network Analysis
           Honda, Yutaka* and Brim, Brad** (*ATE Service Corporation,
           Japan and **Sigrity, USA)

17:10   Handling of Passive Component Model in Transmission-line
         Simulation
           Matsuzawa, Hirohiko (Zuken, Japan)

17:30   Open Discussions

17:55   Concluding Items

18:00   END OF MEETING

-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC


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Received on Wed Oct 28 10:23:13 2009

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