RE: [IBIS] C_comp Max < C_comp Min

From: Muranyi, Arpad <Arpad_Muranyi@mentor.com>
Date: Mon Sep 27 2010 - 07:34:50 PDT

Fabio,
 
The reason you are getting that message is because the die capacitance
does not have a direct relationship with the fast/slow process corners
and when we wrote the IBIS specification we decided that it was best
to just put the small number into the min place and the big number into
the max place. It was expected that an EDA tool would allow the user
to try out all possible combinations between min/max curves and C_comp.
 
Arpad
========================================================================

________________________________

From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Fabio
BRINA
Sent: Monday, September 27, 2010 7:12 AM
To: ibis@server.eda.org; ibis-users@server.eda.org
Subject: [IBIS] C_comp Max < C_comp Min

Hello Ibis experts,

 

 I'm working in CMOS tecnology;

 very often in the C_comp extraction I obtain the Min value bigger then
Max value:

 the values come from ac simulations in these conditions:

 

 C_comp Min value consider: Vcc Min, Process Min, Temp Max

 C_comp Max value consider: Vcc Max, Process Max, Temp Min

 

 The Ibis Check output is:

 

WARNING (line 76) -

    Model mod1: C_comp min value is not the smallest value listed

WARNING (line 76) -

    Model mod1: C_comp max value is not the largest value listed

 

Is that situation acceptable?

or I have to switch the Min Value with Max Value?

 

... suggestions are welcome !

 

Thank you,

Fabio

 

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Received on Mon Sep 27 07:35:20 2010

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