RE: [IBIS] Validation of composite current

Mike,

Regarding your answer #1, that was not the only intent.  In addition
to that, the information in [Composite Current] can also be used to
calculate the supply currents more accurately so that the noise in
the non-ideal supply would be simulated more accurately in SI/PI
simulations.  In these situations the pre-driver current can also be
important if it comes from the same supply terminals as the output
stage.

Thanks,

Arpad
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From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Mike LaBonte
Sent: Sunday, March 10, 2013 3:09 PM
To: Rinsha Reghunath
Cc: ibis@eda.org; ibis-users@eda.org
Subject: Re: [IBIS] Validation of composite current

When you write "IBIS I-T curves are getting truncated at the rise and fall transitions" do you mean EDA tools are doing the truncating? There are several behaviors among the tools, and the tendency is to reduce the length of the V-T curves to the minimum needed to represent an edge, to avoid overclocking issues. But the fact that current changes often appear before the voltage changes at the output does raise does raise some questions:

1) Is it necessary to capture pre-driver current? The intention of [Composite Current] was to improve k-factor determination for Pullup/Pulldown turnon/turnoff. Currents before the start of the output transition should be irrelevant.

2) Should IBIS add features to model transition intervals that are shorter than the waveforms needed to fully characterize each transition, without discarding data? This was discussed recently, and I believe it was seen as a significant challenge.

Mike

On Fri, Mar 8, 2013 at 11:01 AM, Rinsha Reghunath <Rinsha.Raghunath@synopsys.com<mailto:Rinsha.Raghunath@synopsys.com>> wrote:
Hi,

I am trying to validate an IBIS 5.1 model generated for DDR3 with ISSO_PU/PD and Composite Current data. The V-T and I-T data is not clipped in order to capture pre-driver current better and the I-T table has 1000 points. When I tried to do a transient analysis for validation, SPICE and IBIS V-T waveforms are matching at the DDR3 frequency, but IBIS I-T curves are getting truncated at the rise and fall transitions and doesnot correlate well with SPICE. The pre-driver current is being lost. When the frequency is reduced, there is good SPICE - IBIS matching for I-T.

Is this issue known or is it an issue in the IBIS model?

I have read in http://www.eda.org/ibis/summits/may11/m051111.pdf that "adding [Composite Current] data to the model reduced the valid switching rate of the model." Is the above issue related to this?

Thanks.

Regards,
Rinsha


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