****************************************************************************** ****************************************************************************** BIRD ID#: 95.1 ISSUE TITLE: Power Integrity Analysis using IBIS REQUESTER: Syed Huq, Vinu Arumugham, Zhiping Yang - Cisco Systems, Inc DATE SUBMITTED: December 13th, 2004 DATE REVISED: January 28th, 2005 DATE ACCEPTED BY IBIS OPEN FORUM: PENDING ****************************************************************************** ****************************************************************************** STATEMENT OF THE ISSUE: Power Integrity Analysis which includes Current switching profile of the Core as well as Simultaneous Switching Noise (SSN) of the Input/Output (I/O) stages of a buffer needs to be analyzed through IBIS. This BIRD proposes a modeling scheme to solve this. ****************************************************************************** STATEMENT OF THE RESOLVED SPECIFICATIONS: Changes are noted in the relevant sections below by |* lines. Power Integrity Analysis from a modeling perspective has been split into two tasks. 1)Solving the Simultaneous Switching Noise (SSN) on the I/O level using current and future IBIS syntax. This will be achieved through IvsT tables. 2)Solving the Core Current Switching profile using the ICEM (Integrated circuits Electrical Model specification, Project number 62014-3). This will be achieved by a call statement within IBIS calling an ICEM model. Using v4.1 IBIS syntax. replace: Current into the power and ground rails are needed to give a more accurate analysis for ground and power bounce associated with simultaneous switching noise. with: |*Current into the power and ground rails are needed to give a more accurate |*analysis for ground and power bounce associated with simultaneous switching noise. | |============================================================================== replace: | Keywords: [Series Composite Current] with: |* Keywords: [Composite Current] | Required: No replace: | Description: Describes the shape of the rising and falling edge | current waveforms from the power supply measured through | R_VDD(see diagram). This includes Pre-driver, Crow-bar current, | on-die I_bypass and I_term(see diagram). with: |* Description: Describes the shape of the rising and falling edge |* current waveforms from the power supply measured through |* R_VDDQ(see diagram). This includes Pre-driver, Crow-bar current, |* on-die I_byp and I_term(see diagram). replace: | Usage Rules: The [Series Composite Current] keyword is positioned under the with: |* Usage Rules: The [Composite Current] keyword is positioned under the | [Rising Waveform] (for rising waveform currents) and | [Falling Waveform (for falling waveform currents. The keywords | are followed by a table of time vs. current points that describe | the shape of a current waveform. These time/current tables | inherit the fixture test load of the [Rising Waveform] | or [Falling Waveform] R/L/C/V_fixture and R/L/C_dut subparameters. | | The recommended loading condition is 50 Ohms to Vdd and | 50 Ohms to Gnd for each [Rising Waveform] and [Falling | [Waveform]. | | The recommended no-load condition is a R_fixture of 1.0Meg | Ohms minimum for each [Rising Waveform] and [Falling | [Waveform]. | | The table itself consists of one column of time points, then | three columns of current points in the standard typ, min, and | max format.The four entries must be placed on a single line and | must be separated by at least one white space. All four | columns are required. However, data is only required in the | typical column. If minimum or maximum data is not available, | use the reserved word "NA". The first value in the time column | need not be '0'. Time values must increase as one parses down | the table. The waveform table can contain a maximum of 1000 | data points. A maximum of 100 waveform tables are allowed per | model. | | The diagram below illustrates the complete model with | respect to the [Rising Waveform] and [Falling Waveform] | subparameters. | | The 'fixture' subparameters specify the loading | conditions under which the waveform is taken. The R_dut, | C_dut, and L_dut subparameters are analogous to the | package parameters R_pkg, C_pkg, and L_pkg and are used | if the waveform includes the effects of pin | inductance/capacitance. | | | | | | | | | | | PACKAGE | TEST FIXTURE | ____|____ | | | DUT | L_dut R_dut | L_fixture R_fixture | | die |---@@@@@--/\/\/\--o-----|--@@@@---o---/\/\/\--- V_fixture | |_________| | | | | | | | | | | | | | | | C_dut === | === C_fixture | | | | | | |_______________________|_____|_________|___ | GND | | replace: | | | -------- -------- (**) | | | | |<--- | _____________________________________________|L_VDDQ|_|R_VDDQ|__VDDQ | | | | | | | | | | | | | | | | -------- -------- | ----- | | | | | | E | | / | | | | S | ---------------- \ P_| --- PowerClamp | | R | | Pre-Driver | / || / \ | ----- | Circuit | \ ||__ --- | | | powered by | | | | | | | VDDQ | | | | | I_sig | ----- ---------------- | | | | -------> | | E | | o-----o--|----o---------- | | S | | | | | | | | | L | | | | / | | | |I_bypass| ----- I_pre| |I_term| \ N_| v --- GNDClamp | | | | | | / || I_cb / \ | v | v | v \ ||_ --- | ----- | | | | ------ ------- | ----- C_p+b | | | | | | | | | |___________________|_________|_____|_______|___|L_GND|_|R_GND|__GND | | | | | | ------ ------- | | I_bypass - Bypass current | I_pre - Pre-Driver current | I_cb - Crow-bar current | I_term - Termination current (optional) | L_VDDQ - On-die inductance of I/O Power | R_VDDQ - On-die resistance of I/O Power | L_GND - On-die inductance of Ground | R_GND - On-die resistance of Ground | C_p+b - Bypass + Parasitic Capacitance | ESR - Equivalent Series Resistance for on-die Decap | ESL - Equivalent Series Inductance for on-die Decap | | (**) - Current measure point with: |* VDDQ |* Black Box (**) o |* ___________________________________________________________________________||__ |*| || | |*| || | |*| v| | |*| -------- -------- | | |*| | | | | | | |*| ____________________________________________|L_VDDQ|_|R_VDDQ|__| | |*| | | | | | | | | | | |*| | | | | | -------- -------- | |*| ----- | | | | | |*| | E | | / | | | |*| | S | ---------------- \ P_| --- PowerClamp | |*| | R | | Pre-Driver | / || / \ | |*| ----- | Circuit | \ ||_ --- | |*| | | powered by | | | | | |*| | | VDDQ | | | | | I_sig | |*| ----- ---------------- | | | | -------> | |*| | E | | o-----o--|----o---------------------------o |*| | S | | | | | | | Sig |*| | | L | | | | / | | | | |*| I_byp| ----- I_pre| |I_term| \ N_| v --- GNDClamp | |*| | | | | | / || I_cb / \ | |*| v | v | v \ ||_ --- | |*| ----- | | | | ------ ------- | |*| ----- C_p+b | | | | | | | | | |*| |___________________|_________|_____|_______|___|L_GND|_|R_GND|__ | |*| | | | | | | |*| ------ ------- | | |*| | | |*| | | |*|____________________________________________________________________________|__| |* | |* o |* GND |* |* |* The model is represented as a 'Black Box' with 3 terminals |* available for measurement. The internals of this 'Black Box' is |* is only shown to add clarity to the various currents under |* consideration. Most SPICE models may act as a 'Black Box' since it |* may be encrypted. |* |* (**) IvsT - current through VDDQ terminal. |* Z_VDDQ - impedance measured between VDDQ and GND terminals. |* Z_VDDQ includes effects of all components shown |* in the Black Box. Z_VDDQ is modeled using ICM. |* |* |* I_byp - Bypass current |* I_pre - Pre-Driver current |* I_cb - Crow-bar current |* I_term - Termination current (optional) |* L_VDDQ - On-die inductance of I/O Power |* R_VDDQ - On-die resistance of I/O Power |* L_GND - On-die inductance of Ground |* R_GND - On-die resistance of Ground |* C_p+b - Bypass + Parasitic Capacitance |* ESR - Equivalent Series Resistance for on-die Decap |* ESL - Equivalent Series Inductance for on-die Decap |* |* |* |======================== Example ============================== | |* Example updates: | |* from [Series Composite Current] | |* to [Composite Current] | [Rising Waveform] R_fixture = 50.0 V_fixture = 1.8 | ... | ... | Rising Waveform table | ... [Composite Current] | | | Time I(typ) I(min) I(max) 0 4.243E-05 NA NA 4.00E-11 4.244E-05 NA NA 8.00E-11 4.242E-05 NA NA 1.20E-10 4.265E-05 NA NA 1.60E-10 3.610E-05 NA NA 2.00E-10 3.903E-03 NA NA . . . 3.80E-09 5.106E-05 NA NA 3.84E-09 5.013E-05 NA NA 3.88E-09 4.919E-05 NA NA 3.92E-09 4.826E-05 NA NA 3.96E-09 4.733E-05 NA NA 4.00E-09 5.108E-05 NA NA | [Rising Waveform] R_fixture = 50.0 V_fixture = 0.0 | ... | ... | Rising Waveform table | ... [Composite Current] | Time I(typ) I(min) I(max) 0 4.243E-05 NA NA 4.00E-11 4.244E-05 NA NA 8.00E-11 4.242E-05 NA NA 1.20E-10 4.265E-05 NA NA 1.60E-10 3.610E-05 NA NA 2.00E-10 3.903E-03 NA NA . . . 3.80E-09 2.012E-02 NA NA 3.84E-09 2.012E-02 NA NA 3.88E-09 2.012E-02 NA NA 3.92E-09 2.012E-02 NA NA 3.96E-09 2.012E-02 NA NA 4.00E-09 2.012E-02 NA NA | [Falling Waveform] R_fixture = 50.0 V_fixture = 1.8 | ... | ... | Rising Waveform table | ... [Composite Current] | Time I(typ) I(min) I(max) 0 4.302E-05 NA NA 4.00E-11 4.299E-05 NA NA 8.00E-11 4.304E-05 NA NA 1.20E-10 4.287E-05 NA NA 1.60E-10 4.782E-05 NA NA 2.00E-10 1.459E-04 NA NA . . . 3.80E-09 4.933E-05 NA NA 3.84E-09 5.211E-05 NA NA 3.88E-09 5.490E-05 NA NA 3.92E-09 5.441E-05 NA NA 3.96E-09 4.842E-05 NA NA 4.00E-09 4.244E-05 NA NA | [Falling Waveform] R_fixture = 50.0 V_fixture = 0.0 | ... | ... | Falling Waveform table | ... [Composite Current] | Time I(typ) I(min) I(max) 0 2.011E-02 NA NA 4.00E-11 2.011E-02 NA NA 8.00E-11 2.011E-02 NA NA 1.20E-10 2.011E-02 NA NA 1.60E-10 2.012E-02 NA NA 2.00E-10 2.022E-02 NA NA . . . 3.80E-09 4.870E-05 NA NA 3.84E-09 4.929E-05 NA NA 3.88E-09 4.989E-05 NA NA 3.92E-09 5.048E-05 NA NA 3.96E-09 5.108E-05 NA NA 4.00E-09 4.843E-05 NA NA | | [Rising Waveform] R_fixture = 1.0Meg V_fixture = 0.0 | ... | ... | Rising Waveform table | ... [Composite Current] | | Time I(Typ) I(Min) I(Max) 0 4.243E-05 NA NA 4.00E-11 4.244E-05 NA NA 8.00E-11 4.242E-05 NA NA 1.20E-10 4.265E-05 NA NA 1.60E-10 3.610E-05 NA NA 2.00E-10 3.903E-03 NA NA . . . 3.80E-09 5.671E-05 NA NA 3.84E-09 5.639E-05 NA NA 3.88E-09 5.607E-05 NA NA 3.92E-09 5.557E-05 NA NA 3.96E-09 5.481E-05 NA NA 4.00E-09 5.405E-05 NA NA | [Falling Waveform] R_fixture = 1.0Meg V_fixture = 0.0 | ... | ... | Falling Waveform table | ... [Composite Current] | | Time I(Typ) I(Min) I(Max) 0 4.304E-05 NA NA 4.00E-11 4.300E-05 NA NA 8.00E-11 4.306E-05 NA NA 1.20E-10 4.288E-05 NA NA 1.60E-10 4.784E-05 NA NA 2.00E-10 1.459E-04 NA NA . . . 3.80E-09 1.239E-04 NA NA 3.84E-09 9.279E-05 NA NA 3.88E-09 6.168E-05 NA NA 3.92E-09 3.057E-05 NA NA 3.96E-09 5.373E-07 NA NA 4.00E-09 3.165E-05 NA NA | | ============================================================== | | Example Calls to ICEM SPICE model: | | | [Circuit Call] IECM1 | mapping port node | Port_map vdd_ic 11 Port_map vss_ic 12 | [End Circuit Call] | Connecting vdd_ic to pin 11 and vss_ic to pin 12 | | [External Circuit] ICEM1 Language SPICE | Corner Corner_name file_name circuit_name Corner TYP icem_core1.spi icem_typ1 Corner MIN icem_core1.spi icem_min1 Corner MAX icem_core1.spi icem_max1 | Ports are in the same order as defined in SPICE Ports vdd_ic vss_ic | | | Example Calls to ICEM AMS model: | [Circuit Call] ICEM2 port_map vdd_ic 21 port_map vss_ic 22 [End Circuit Call] | | [External Circuit] ICEM2 Language VHDL-AMS | | Corner corner_name file_name subckt_name Corner Typ icem_core2.vhd icem_typ2 Corner Min icem_core2.vhd icem_min2 Corner Max icem_core3.vhd icem_max2 Ports vdd_ic vss_ic | [End External Circuit] | |* New example added below | |-------------------------------- ICM Model ----------------------------- | | Not an actual implementation. IBIS/ICM link issues need to be resolved. | [Begin ICM Section] [Derivation Method] lumped [ICM S-parameter] File_name hstl_Z_VDDQ.s1p | This contains the Z_VDDQ info Port_assignment | of a single buffer | Port Node . . . . [ICM S-parameter] File_name ASIC_Xbar_Z_VDDQ.s1p | Full component level Z_VDDQ Port_assignment | Port Node . . . . [End ICM Section] | | |------------------------------------------------------------------------------ ****************************************************************************** ANALYSIS PATH/DATA THAT LED TO SPECIFICATION: Power Integrity Analysis has become a significat part of Signal Integrity Simulations and Analysis. Core voltages are going down with process enhacementand, I/O speeds are increasing, it is critical that high-speed applications solve Power Integrity issues on the die, package and PCBs combined. System failures can be traced to poor Power Integrity Designs. During the DesignCon2004 Power Integrity Panel, these issues were discussed. It was suggested to explore a solution through the IBIS commitee and hence this BIRD proposal. Several discussions were conducted(3/12,5/14,6/8,7/16,8/24)with the IBIS Futures Meetings. ****************************************************************************** ANY OTHER BACKGROUND INFORMATION: This proposal is based on various past work done by many IBIS contributors and they are listed in no particular order. Links to ICEM are also listed: DesignCon2004 PDN Simulation panel proceedings material and slides: http://home.att.net/~istvan.novak/papers.html BIRD42.3: Modeling Current Waveforms C.Kumar, Bob Ross IBIS and ICEM interaction: B.Ross, Microelectronic Journal Nov16,2003 ICEM: ---- EMC for Component, Integrated circuits Electrical Model(ICEM) 93/XX/CDC, Project number 62014-3 Cookbook for Integrated Circuit model ICEM, Project number 62014-3 IBIS Summits: ------------- EMC model for prediction of parasitic emission, E.Sicard, Mar2001 Electromagnetic Compatibility simulation of Printed Circuit Board, M.Christian, Mar2001 ICEM - Proposal IEC62014-3, J.C.Perrin, Mar2001 Advances of the ICEM model for Emission of Integrated Circuit, S.Calvet, Jan2001 Adding On-Chip Capacitance in IBIS Format for SSO Simulation, R.Chen, Jan2004 Simultaneous Switching Noise(SSN)Modeling, B.Unger Jan2000 Crossbar-current out of CMOS-IBIS-Models, K.Koller & G.Bannert, Mar2002 IC-Emit Comparing Simulated/Measured IC Emission Spectrum, E.Sicard & A.Soubeyran Feb2004 *********************************************************************************