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BIRD ID#:        144.1
ISSUE TITLE:     Add Touchstone to [External Model] and [External Circuit] as a Supported Language
REQUESTER:       Taranjit Kukal, Feras Al-Hawari, Ambrish Varma, Terry Jernberg, Cadence Design Systems, Inc.;
		 Kent Dramstad, Adge Hawes, IBM Microelectronics
DATE SUBMITTED:  September 19, 2011
DATE REVISED:    November 10, 2011
DATE ACCEPTED BY IBIS OPEN FORUM: 

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Lines beginning with * or |* indicate changes in BIRD144
Lines beginning with ** or |** indicate changes in BIRD144.1

STATEMENT OF THE ISSUE:

** S-parameter data can be used, for example, to describe transfer characteristics 
of I/O buffer amplifiers, On DIE Terminations (ODT), and On DIE RDL 
** parasitics. Mostly, the S-parameter data is saved according to the 
** Touchstone file format. Therefore, adding Touchstone to the list of 
languages that are supported by the [External Model] and [External Circuit] 
** sections would enable the direct usage of Touchstone S-parameter files in 
IBIS without the need to wrap and instantiate such models in a SPICE like 
subcircuit.  

** Different S-parameter files describe different corners and correspond to 
different parameter settings, so it should also be possible to pick different
** S-parameter files for different user-defined corner parameters.

******************************************************************************

STATEMENT OF THE RESOLVED SPECIFICATIONS:

** The new "Touchstone" option shall be added to the list of options supported by
the Language subparameter under the [External Model] and [External Circuit]
** sections. The usage rules of the Touchstone language are very similar to 
those of the SPICE like language options.

Replace all occurrences of:
SPICE, Verilog-A(MS), VHDL-A(MS)
SPICE, Verilog-A(MS) or VHDL-A(MS)
SPICE, Verilog-A(MS) and VHDL-A(MS)

with:
** SPICE, Touchstone, Verilog-A(MS), VHDL-A(MS)
** SPICE, Touchstone, Verilog-A(MS) or VHDL-A(MS)
** SPICE, Touchstone, Verilog-A(MS) and VHDL-A(MS)

Replace all occurrences of:
SPICE, VHDL-A(MS), Verilog-A(MS)
SPICE, VHDL-A(MS) or Verilog-A(MS)
SPICE, VHDL-A(MS) and Verilog-A(MS)

with:
** SPICE, Touchstone, VHDL-A(MS), Verilog-A(MS)
** SPICE, Touchstone, VHDL-A(MS) or Verilog-A(MS)
** SPICE, Touchstone, VHDL-A(MS) and Verilog-A(MS)

** On page 99 in the IBIS 5.0 specification, insert after the following lines: 
** | "SPICE" refers to SPICE 3, Version 3F5 developed by the University of
** | California at Berkeley, California.  Many vendor-specific EDA tools are
** | compatible with most or all of this version.

** these lines:
|** "Touchstone" refers to the Touchstone file format version 1.0, version 2.0
|** (ratified April 24, 2009 by the IBIS Open Forum), or later. It is the de facto 
|** industry-standard ASCII text file format used for documenting the n-port 
|** network parameter data and noise data of linear active devices, passive 
|** filters, passive devices, or interconnect networks. It allows representing 
|** the the n-port network using S-parameter, Y-parameter and Z-parameter data.
|*

------------------------------------------------------                                                         
Add D_drive_pos and D_drive_neg to the reserved ports  
------------------------------------------------------

** On page 101 in the IBIS 5.0 specification, insert after the following lines:
|** 12 A_pos        Non-inverting port for series or series switch models
|** 13 A_neg        Inverting port for series or series switch models
|** 14 A_signal_pos Non-inverting port of a differential model
|** 15 A_signal_neg Inverting port of a differential model

these lines:
|* 16 D_drive_pos Non-inverting digital input port of a differential model
|* 17 D_drive_neg Inverting digital input port of a differential model


** On page 105 of the IBIS 5.0 specification, replace the following line:
|  Sub-Params:  Language, Corner, Parameters, Ports, D_to_A, A_to_D

** with:
|*  Sub-Params:  Language, Corner, User_defined_corner, Parameters, Ports, D_to_A, A_to_D

** On page 107 of the IBIS 5.0 specification, replace the following lines:

|               The circuit_name entry provides the name of the circuit to be
|               simulated within the referenced file.  For SPICE files, this
|               is normally a ".subckt" name.  For VHDL-AMS files, this is
|               normally an "entity(architecture)" name pair.  For Verilog-AMS
|               files, this is normally a "module" name.

with:

|               The circuit_name entry provides the name of the circuit to be
|               simulated within the referenced file.  For SPICE files, this
|               is normally a ".subckt" name.  For VHDL-AMS files, this is
|               normally an "entity(architecture)" name pair.  For Verilog-AMS
|**             files, this is normally a "module" name. For Touchstone files, 
|*              the circuit_name is not applicable and should be "NA".

** On page 107 of the IBIS 5.0 specification, insert after the following lines:
|**               should be avoided.  External languages may not support
|**               case-sensitive distinctions. 

** these lines:

|*               User_defined_corner:
|*
|*              The User_defined_corner keyword is an optional keyword and is only
|**             allowed when the Language is Touchstone. 
|
|**             Three entries follow the User_defined_corner subparameter on 
|*              each line:
|*
|**               user_defined_corner_name  file_name corner_name
|*
|*              The user_defined_corner_name entry provides the name of this 
|*              User_defined_corner. A maximum of 100 user defined corners are
|*              allowed.
*
|
|**             The file_name entry provides the Touchstone file name 
|*              associated with this User_defined_corner. 
|*
|*              The corner_name entry provides the corner name associated 
|*              with this User_defined_corner. The corner_name must match
|*              a corner_name defined under the Corner subparameter.
|**     	The "corner_name" column is to be used to decide how this 
|*              user_defined_corner maps to I-V/V-T tables. For example
|*              user_defined_corner "MIN1" is to be used in conjunction 
|**             with min I-V, V-T tables by the EDA tool.
|*              EDA tool could show additional corners (as defined by 
|** 	        user_defined_corners) for user selection; 
|**      	but mapping to corner (typ, min, max) would decide
|**             which I-V/V-T tables need to be associated.
|*
|**             In the context of Algorithmic Model for type 'Corner', 
|**             there is no change, as the corner in a .ami file should map the corner 
|**             to typ/min/max I-V/V-T tables. Any choice of User_defined_corner in a .ami
|**             file should be done explicitly as a separate model parameter.
|
|**             No case-sensitivity limits or extension
|*              conventions are required or enforced for user_defined_corner_name
|*              and file_name entries.  However, lower-case file_name entries 
|*              are recommended to avoid possible conflicts with file naming 
|**             conventions under different operating systems. The length
|**             of each of these entries is limited to 40 characters each.
|*

** On page 107 of the IBIS 5.0 specification, replace the following lines:
|               Parameter passing is not supported in SPICE.  VHDL-AMS and
|               VHDL-A(MS) parameters are supported using "generic" names, and
|               Verilog-AMS and Verilog-A(MS) parameters are supported using
|               "parameter" names.

with:
|**             Parameter passing is not supported in SPICE or Touchstone. VHDL-AMS 
|**             and VHDL-A(MS) parameters are supported using "generic" names, and
|               Verilog-AMS and Verilog-A(MS) parameters are supported using
|**             "parameter" names. Touchstone files are selected through the
|**             User_defined_corner definitions.

** On page 125 of the IBIS 5.0 specification, replace the following line:
|  Sub-Params:  Language, Corner, Parameters, Ports, D_to_A, A_to_D

** with:
|**  Sub-Params:  Language, Corner, User_defined_corner, Ports, D_to_A, A_to_D

** On page 125 of the IBIS 5.0 specification, replace the following lines:

|               The circuit_name entry provides the name of the circuit to be
|               simulated within the referenced file. For SPICE files, this
|               is normally a ".subckt" name. For VHDL-AMS files, this is
|               normally an "entity(architecture)" name pair. For Verilog-AMS
|               files, this is normally a "module" name.

with:

|               The circuit_name entry provides the name of the circuit to be
|               simulated within the referenced file. For SPICE files, this
|               is normally a ".subckt" name. For VHDL-AMS files, this is
|               normally an "entity(architecture)" name pair. For Verilog-AMS
|**              files, this is normally a "module" name. For Touchstone files,
|**             the circuit_name is not applicable and should be "NA". 

** On page 126 of the IBIS 5.0 specification, insert after the following lines:
|**               avoided.  External languages may not support case-sensitive
|**               distinctions.

** these lines:

|*              User_defined_corner:
|*
|*              The User_defined_corner keyword is an optional keyword and is only
|**             allowed when the Language is Touchstone. 
|*
|**             Three entries follow the User_defined_corner subparameter on 
|*              each line:
|*
|**                user_defined_corner_name  file_name corner_name
|*
|*              The user_defined_corner_name entry provides the name of this 
|*              User_defined_corner. A maximum of 100 user defined corners are
|*              allowed.
|*
|**             The file_name entry provides the Touchstone file name 
|*              associated with this User_defined_corner. 
|*
|*              The corner_name entry provides the corner name associated 
|*              with this User_defined_corner. The corner_name must match
|*              a corner_name defined under the Corner subparameter.
|*              The "corner_name" column is to be used to decide how this 
|**             user_defined_corner maps to I-V/V-T tables. For example
|*              user_defined_corner "MIN1" is to be used in conjunction 
|**       	with min I-V, V-T tables by the EDA tool.
|*              EDA tool could show additional corners (as defined by 
|**             user_defined_corners) for user selection; 
|**             but mapping to corner (typ, min, max) would decide
|**      	which I-V/V-T tables need to be associated.
|
|**             In the context of Algorithmic Model for type ‘Corner’, 
|**             there is no change, as the corner in a .ami file should map the corner 
|**             to typ/min/max I-V/V-T tables. Any choice of User_defined_corner in a .ami
|**             file should be done explicitly as a separate model parameter.
|
|**             No case-sensitivity limits or extension
|*              conventions are required or enforced for user_defined_corner_name
|*              and file_name entries.  However, lower-case file_name entries 
|*              are recommended to avoid possible conflicts with file naming 
|**             conventions under different operating systems. The length
|**             of each of these entries is limited to 40 characters each.
|

** On page 126 of the IBIS 5.0 specification, replace the following lines:
|               Parameter passing is not supported in SPICE. VHDL-AMS and
|               VHDL-A(MS) parameters are supported using "generic" names, and
|               Verilog-AMS and Verilog-A(MS) parameters are supported using
|               "parameter" names.

with:
|**             Parameter passing is not supported in SPICE and Touchstone. VHDL-AMS
|**             and VHDL-A(MS) parameters are supported using "generic" names, and
|               Verilog-AMS and Verilog-A(MS) parameters are supported using
|**             "parameter" names. Touchstone files are selected through the
|**             User_defined_corner definitions.


---------------------------------------------
** EXAMPLES for [External Model] using Touchstone
---------------------------------------------
** Add these lines after the SPICE example in page 118 of the IBIS 5.0 specification:

|-------------------------------------------
|** Example [External Model] using Touchstone:
|-------------------------------------------
|
[Model] ExLinearBufferTouchstone
Model_type Output
|
| Other model subparameters are optional
|
|                 typ     min    max
[Voltage Range]   3.3     3.0    3.6
|
[Ramp]
dV/dt_r        1.57/0.36n   1.44/0.57n   1.73/0.28n
dV/dt_f        1.57/0.35n   1.46/0.44n   1.68/0.28n
|
[External Model]
** Language Touchstone
|
| Corner corner_name file_name       circuit_name 
Corner    Typ         buffer_typ.s2p  NA
Corner    Min         buffer_min.s2p  NA
Corner    Max         buffer_max.s2p  NA
|
|** Ports List of port names (in same order as in Touchstone)
** Ports my_drive A_signal | my_drive should be connected to port 1 of Touchstone
**                        | A_signal should be connected to port 2 of Touchstone
|
| D_to_A d_port   port1     port2    vlow vhigh trise tfall corner_name 
D_to_A   D_drive  my_drive  A_pdref   0.0  3.3  0.5n  0.3n   Typ
|
[End External Model]
|
|------------------------------------------------------------------
|** Example [External Model] using Touchstone with 2 userdef corners:
|------------------------------------------------------------------
|
[Model] ExLinearBufferTouchstoneWithTwoUserDefCorners
Model_type Output
|
| Other model subparameters are optional
|
|                 typ     min    max
[Voltage Range]   3.3     3.0    3.6
|
[Ramp]
dV/dt_r        1.57/0.36n   1.44/0.57n   1.73/0.28n
dV/dt_f        1.57/0.35n   1.46/0.44n   1.68/0.28n
|
[External Model]
** Language Touchstone
|
| Corner corner_name file_name        circuit_name
Corner    Typ         buffer_typ.s2p   NA
Corner    Min         buffer_min.s2p   NA
Corner    Max         buffer_max.s2p   NA
|
** | User_defined_corner user_defined_corner_name file_name 		corner_name
** User_defined_corner    Min1       		buffer_min1.s2p  	 Min
** User_defined_corner    Max1    		buffer_max1.s2p  	 Max
|
|** Ports List of port names (in same order as in Touchstone)
** Ports my_drive A_signal | my_drive should be connected to port 1 of Touchstone
**                        | A_signal should be connected to port 2 of Touchstone
|
| D_to_A d_port   port1     port2    vlow vhigh trise tfall corner_name 
D_to_A   D_drive  my_drive  A_pdref   0.0  3.3  0.5n  0.3n   Typ
|
[End External Model]
|

** Add these lines after the SPICE example in page 122 of the IBIS 5.0 specification:

|----------------------------------------------------------------
|** Example of True Differential [External Model] using Touchstone:
|----------------------------------------------------------------
|
[Model] Ext_Linear_Diff_Output_Buff_Touchstone
Model_type Output_diff
Rref_diff = 100
|
| Other model subparameters are optional
|
|                 typ     min    max
[Voltage Range]   3.3     3.0    3.6
|
[Ramp]
dV/dt_r        1.57/0.36n   1.44/0.57n   1.73/0.28n
dV/dt_f        1.57/0.35n   1.46/0.44n   1.68/0.28n
|
[External Model]
** Language Touchstone
|
| Corner corner_name file_name        circuit_name 
Corner    Typ         diffout_typ.s4p  NA
Corner    Min         diffout_min.s4p  NA
Corner    Max         diffout_max.s4p  NA
|
|** Ports List of port names (in same order as in Touchstone)
|
| Based on the Ports order below:
|** my_drive_pos should be connected to port 1 of Touchstone
|** A_signal_pos should be connected to port 2 of Touchstone
|** my_drive_neg should be connected to port 3 of Touchstone
|** A_signal_neg should be connected to port 4 of Touchstone
|
Ports my_drive_pos A_signal_pos my_drive_neg A_signal_neg 
|
| D_to_A d_port        port1          port2     vlow vhigh trise tfall corner_name 
D_to_A    D_drive_pos   my_drive_pos   A_pdref   0.0  3.3   0.5n  0.3n  Typ
D_to_A    D_drive_pos   my_drive_pos   A_pdref   0.0  3.0   0.6n  0.3n  Min
D_to_A    D_drive_pos   my_drive_pos   A_pdref   0.0  3.6   0.4n  0.3n  Max
D_to_A    D_drive_neg   my_drive_neg   A_pdref   0.0  3.3   0.5n  0.3n  Typ
D_to_A    D_drive_neg   my_drive_neg   A_pdref   0.0  3.0   0.6n  0.3n  Min
D_to_A    D_drive_neg   my_drive_neg   A_pdref   0.0  3.6   0.4n  0.3n  Max
|
[End External Model]

-----------------------------------------------
** EXAMPLES on [External Circuit] using Touchstone
-----------------------------------------------
** Add these lines after the SPICE example in page 129 of the IBIS 5.0 specification:

|---------------------------------------------
|** Example [External Circuit] using Touchstone:
|---------------------------------------------
|
** [External Circuit] LINEAR-OUTBUFF-Touchstone
** Language Touchstone
|
| Corner corner_name file_name       circuit_name 
Corner    Typ         buffer_typ.s2p  NA
Corner    Min         buffer_min.s2p  NA
Corner    Max         buffer_max.s2p  NA
|
|** Ports List of port names (in same order as in Touchstone)
** Ports my_in A_signal | my_in should be connected to port 1 of Touchstone
**                      | A_signal should be connected to port 2 of Touchstone
|
| D_to_A d_port   port1  port2    vlow vhigh trise tfall corner_name 
D_to_A   D_drive  my_in  A_pdref 0.0  3.3   0.5n  0.3n  Typ
D_to_A   D_drive  my_in  A_pdref 0.0  3.0   0.6n  0.3n  Min
D_to_A   D_drive  my_in  A_pdref 0.0  3.6   0.4n  0.3n  Max
|
[End External Circuit]
|
|--------------------------------------------------------------------
|** Example [External Circuit] using Touchstone with 4 Userdef Corners:
|--------------------------------------------------------------------
|
** [External Circuit] LINEAR-OUTBUFF-Touchstone-WITH-4-USERDEF-CORNERS
** Language Touchstone
|
| Corner corner_name file_name         circuit_name
Corner    Typ         buffer_typ.s2p    NA
Corner    Min         buffer_min.s2p    NA
Corner    Max         buffer_max.s2p    NA
|
** | User_defined_corner user_defined_corner_name file_name        corner_name
** User_defined_corner    Min1    		  buffer_min1.s2p  Min
** User_defined_corner    Min2    		  buffer_min2.s2p  Min
** User_defined_corner    Max1    		  buffer_max1.s2p  Max
** User_defined_corner    Max2    		  buffer_max2.s2p  Max
|
|** Ports List of port names (in same order as in Touchstone)
** Ports my_in A_signal | my_in should be connected to port 1 of Touchstone
**                      | A_signal should be connected to port 2 of Touchstone
|
| D_to_A d_port   port1  port2    vlow vhigh trise tfall corner_name 
D_to_A   D_drive  my_in  A_pdref 0.0  3.3   0.5n  0.3n  Typ
D_to_A   D_drive  my_in  A_pdref 0.0  3.0   0.6n  0.3n  Min
D_to_A   D_drive  my_in  A_pdref 0.0  3.6   0.4n  0.3n  Max
|
[End External Circuit]
|

** Add these lines after the SPICE example in page 131 of the IBIS 5.0 specification:

|---------------------------------------------
|** Example [External Circuit] using Touchstone:
|---------------------------------------------
|
** [External Circuit] BUS_Touchstone
** Language Touchstone
|
| Corner corner_name file_name     circuit_name 
Corner    Typ         bus_typ.s14p  NA
Corner    Min         bus_min.s14p  NA
Corner    Max         bus_max.s14p  NA
|
|** Ports are in same order as defined in Touchstone
|
| Based on the Ports order below:
|** vcc      should be connected to port 1 of Touchstone
|** gnd      should be connected to port 2 of Touchstone
|** io1      should be connected to port 3 of Touchstone
|** io2      should be connected to port 4 of Touchstone
|** int_ioa  should be connected to port 5 of Touchstone
|** vcca1    should be connected to port 6 of Touchstone
|** vcca2    should be connected to port 7 of Touchstone
|** vssa1    should be connected to port 8 of Touchstone
|** vssa2    should be connected to port 9 of Touchstone
|** int_iob  should be connected to port 10 of Touchstone
|** vccb1    should be connected to port 11 of Touchstone
|** vccb2    should be connected to port 12 of Touchstone
|** vssb1    should be connected to port 13 of Touchstone
|** vssb2    should be connected to port 14 of Touchstone
|
Ports vcc gnd io1 io2
Ports int_ioa vcca1 vcca2 vssa1 vssa2
Ports int_iob vccb1 vccb2 vssb1 vssb2
|
| No A_to_D or D_to_A required, as no digital ports are used
|
[End External Circuit]

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ANALYSIS PATH/DATA THAT LED TO SPECIFICATION 

The parameters defined in this BIRD came from commercial S-parameter-AMI 
model development efforts and SPICE-IO-AMI modeling efforts where new 
functionality was needed to meet customer expectations for model 
functionality, accuracy and performance. The parameters in this BIRD 
were defined by Cadence and its semiconductor partners. These parameters are 
being contributed to IBIS to ensure SPICE-AMI model accuracy and portability. 

** The D_drive_pos and D_drive_neg ports are needed to allow the model maker to make
** differential buffer models with two ports for the stimulus input, one using
** a non-inverted, and the other using an inverted stimulus signal. Note that,
** BIRD 129 also addresses the previous issue in a slightly different manner.
** Our proposed approach can also make use of the polarity argument proposed
** in BIRD 129 to make it possible to put the converter into an inverted mode of 
** operation. Preferably, our syntax as well as the syntax in BIRD 129 may be 
** consolidated to provide a more robust solution. We will leave it to the IBIS 
** steering committee to decide on this matter. 
 
** The use of corner_name is related to BIRD145 that proposes direct connection 
** of regular IBIS buffer [Model]s with [External Circuit]s. 

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ANY OTHER BACKGROUND INFORMATION: 


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