====================================================================== IBIS FUTURES/COOKBOOK SUBCOMMITTEE MEETING MINUTES Date: August 11, 2005 Attendees: ---------- Cadence Design Systems - Shangli Wu, Lance Wang Cisco - Syed Huq Intel - Michael Mirmak, Arpad Muranyi Mentor Graphics - John Angulo, Ian Dodd Micron Technology - Randy Wolff North Carolina SU - Ambrish Varma Teraspeed - Bob Ross ====================================================================== Next Meeting: Thursday, August 18 9 AM - 11 AM US Pacific Time Telephone Bridge Passcode 916-356-2663 1 826-7347 Agenda: 9 - 9:05 AM Opens 9:05 - 9:20 AM Cookbook Checkpoint - Summary of changes, status - Further work? Comments? - ICM Cookbook? 9:20 - 10:20 AM Futures Discussion: BIRD95 - Test case status - - Links to Vgs modulation BIRD 10:20 - 11:00 AM Futures Discussion: BIRD100 Draft ======================================================================== The Futures meeting was entirely devoted to BIRD95 discussion. Lance Wang presented a number of slides showing results from a simple transistor-level model under the BIRD95 approach. Output currents for several SSOs were not well predicted by HSPICE. Michael Mirmak proposed several key questions to help develop a consistent approach to BIRD95: - are our objectives in proposing BIRD95 clear? - is the current BIRD95 data coverage sufficient to accomplish our objectives? - what experiments, if any, need to be conducted to validate BIRD95's approach? - what limits, if any, exist on the approach (HSTL only, etc.)? - integration with other BIRDs (BIRD98)? - AR assignment, schedule of work? The responses to each of these are listed below. - are our objectives in proposing BIRD95 clear? Michael suggested two objectives: (1) represent the impedance of the power path through the buffer; (2) represent the crowbar and predriver current as composite I-T table set. Bob Ross also noted that "decomposing" the composite current is an implication of the BIRD. - is the current BIRD95 data coverage sufficient? Bob Ross commented that BIRD95 contains no algorithms, just data sets. Syed and Lance expressed some disagreement over the current approach and algorithm assumptions demanded by the data format. Syed suggested that the BIRD data is sufficient to simulate the buffer power behavior with good accuracy. Lance expressed doubt about this, based upon Cadence results. Syed responded that the ZVDDQ extraction quality and assumptions may be essential difference between the Cadence and Cisco results. Lance mentioned that Zhiping Yang used DC R + AC L to model power delivery paths, but that Cadence did not find an inductance value. Michael commented that some of his own research matching the transistor and IBIS model showed both state-dependencies (is the buffer driving low or high?) and significant differences in the frequency domain when equivalent behaviors are modeled using RC circuits - what experiments, if any, need to be conducted to validate BIRD95's approach? Syed commented that he does not want to repeat an extensive exercise in simulation to validate BIRD95 on a simple buffer when significant work was already done on a buffer from a third-party under NDA. Unfortunately, that buffer could not be publicly distributed. The team should agree on a common, modern buffer to use as a gold standard in testing BIRD95. Lance added that we are running into "a whole scientific" problem: how many tests are necessary to validate the BIRD95 approach? Michael agreed, but did not believe we could solve the problem of induction in a reasonable time for BIRD95 adoption. The team agreed one modern case, with well-correlated behaviors, would be sufficient to demonstrate the BIRD95 method. Critically, assumptions and test decks should be held in common. Bob agreed, noting that different approaches with different databases should be avoided. Syed asked that not only the model, but the tests, transmission line model, and package model be agreed upon. Bob asked whether are there any issues with the test buffer currently being shared by Cadence. Arpad and Michael commented that, yes, the buffer uses ideal node 0 for its pulldown reference and has substrates disconnected from the rails. - what limits, if any, exist on the approach (HSTL only, etc.)? - integration with other BIRDs (BIRD98)? - AR assignment, schedule of work Syed commented that no explicit limits are needed in the language of the BIRD; design-specific comments may be needed (for example, on differential structures). Bob agreed. Syed added that no linking between BIRD98 and BIRD95 should be made explicit yet. The reasoning here is the same as why core-level modeling was removed from the BIRD. Lance noted that Antonio Girardi from STMicroelectronics has been doing excellent work on Vgs modulation. Why is there a problem with sticking the Vgs and BIRD95 proposals together? Bob responded that keeping the BIRDs separate is a good idea when passing them for approval through the IBIS Open Forum. However both BIRD97/98 and BIRD95 end up, both will appear together in the final document and will be linked. There is no point in holding one or recombining them. Syed commented that the test cases should be made explicit. Ambrish Varma agreed, noting that Cadence spelled out quiet line analysis. Cisco used DC-only tests, which may not be possible (no ringing, etc.). Suggested tests should include quiet line, with common package and transmission line load. Bob suggested that the t-line not be used. Bob also noted that no ground inductance existed in the Cisco cases, and Sigrity raised significant issues regarding "ideal ground" as a concept. Lance added that no upper loop inductance was included in the test case setup; Sigrity's criticism focused on the total loop. Michael adjourned the meeting, stating that the team should coordinate offline on priorities, tests and test cases. ARs ----- Arpad/MM/Randy: get encrypted models of recent designs for limited distribution