From: Mirmak, Michael Sent: Tuesday, February 19, 2013 8:56 PM To: IBIS-Interconnect (ibis-interconn@freelists.org) Subject: Minutes, Feb. 6 IBIS-Interconnect Task Group and Feb. 20, 2013 Agenda ====================================================================== IBIS INTERCONNECT TASK GROUP MEETING http://www.eda.org/ibis/interconnect_wip/ Mailing list: ibis-interconn@freelists.org ====================================================================== Next meeting: Feb. 20, 2013 8 AM US Pacific Time Agenda: Attendance Call for Patents Agenda and Opens Review Si2 Specification Status Impact of “new BIRD” on Interconnect? Next Meetings’ Schedule/Agenda: • Feb. 20 • Feb. 27 (?) For international numbers, please contact Michael Mirmak. Note: in case of issues with Lync we will use the WebEx noted at the bottom of this message ......................................................................................................................................... Join online meeting https://meet.intel.com/michael.mirmak/QZ193W0C First online meeting? [!OC([1033])!] ......................................................................................................................................... <--- Reservationless Bridge – Do not edit or remove --- 916-356-2663, 8-356-2663, Bridge: 2, Passcode: 8625431 Speed dialer: inteldialer://2,8625431 -----------------------------------------------------------------> Note: in case of issues with Lync we will use the WebEx noted at the bottom of this message ====================================================================== Attendees, Feb. 6 Agilent Technologies Radek Biernacki* Altera David Banas ANSYS Luis Armenta*, Steve Pytel Cadence Design Systems Brad Brim*, Ambrish Varma Intel Michael Mirmak* Mentor Graphics Arpad Muranyi* Micron Technology Justin Butterfield*, Randy Wolff QLogic Jason Zhou Signal Integrity Software Walter Katz* Teraspeed Consulting Group Bob Ross* Minutes No patents were declared. Walter Katz requested Michael Mirmak’s summary Interconnect Task Group presentation from the Summit delivered to the team. Some concerns were raised about stacked die in IBIS vs. in EMD. Michael presented the slides. Brad Brim stated that the Si2 specification review should be complete by the first week in March. Walter noted that a list of functional requirements is the right place to start; are we agreed on the functions we want? This is where we need closure. – Packages – Multi-chip modules – Connectors – Interposers – Sockets – Cables – On-Die interconnect descriptions Michael suggests most of these can be addressed directly with IBIS-ISS. Walter disagreed. EMD can address most of these independently of [Model]. EMD can deal with multi-chip modules, connectors, interposers, sockets and cables. Michael asked about treating sockets and/or interposers as part of the package; Walter suggest you can do this OR separate them in EMD. This would enable using different socket manufacturers, for example. Similarly, for interposers: one type is between die and substrate, another is multi-chip modules (one side is several pieces of silicon, other side is board). EMD “stands alone” – it doesn’t need to interact with [Model]. For packages, hooks/handles would support pre-layout vs. post-layout analysis, through EMD to EMD ports or EMD to IBIS ports. Brad stated that, without revealing details, Si2’s approach has no tie to subcircuits. The other part of Si2 is to generate the EMD file; this is an aid to the IC vendor to generate the EMD files. EMD defines connections between pins of the module and pins of IBIS files, but does not define connections to [Model]s. Arpad Muranyi noted that BIRD116 links to [External Model] and solves some problems but not all, including stacked die support. A revised 122 BIRD will be issued, to cover reported technical developments between SiSoft and Agilent. Walter replied that on-die interconnect is messy and needs discussion. Walter objects to adding stacked-die directly in IBIS, as it’s being supported in EBD and is being extended to EMD. There’s no reason to complicate IBIS files with a stacked die treatment. Regarding usage by IC vendors, Justin Butterfield stated that EMD looks like a good solution, specifically for stacked die. Walter replied that IBIS history is that IBIS files describe a single piece of silicon. Unfortunately, EBD has “board” in it; if we wanted, we could extend it to modules, by replacing path statements by IBIS-ISS subcircuit links and treat extended nets. Michael asked what will happen to the current BIRDs. If BIRD 122 gets revised, it only addresses AMI, not traditional/legacy IBIS needs. Bob Ross noted that there are three proposals: * BIRD 122, for AMI * BIRD 116/117/118 * Third proposal from Arpad to do things in a different, as-yet undefined. Walter stated that there’s a need for coupling coverage (broadband, Touchstone files). If BIRD 116 is used instead of I-V curves, it doesn’t solve their problems for non-linear clamps, etc. Arpad suggested that BIRD 145 is designed to cascade non-linear models, if combined with BIRD116. Arpad suggested that DDR burning needs should be addressed, short term, separate from AMI. Bob responded that EMD could apply to legacy models, as EMD has nothing to do with [Model]. Can [External Circuit] point to a buffer model that’s non-LTI? Arpad replied that we should be thinking of getting away from [External Model] as a keyword. Radek Biernacki stated that, if we go for both solutions, we should establish the rules for what solutions are used in what cases. So, the AMI solution may override the general solution. ====================================================================== In case of Lync issues only, we will switch to WebEx as noted below. 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