================================================================================ IBIS INTERCONNECT TASK GROUP http://www.ibis.org/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ================================================================================ Attendees from February 7, 2018 Meeting (* means attended at least using audio) ANSYS Curtis Clark Cadence Design Systems Bradley Brim Intel Corp. Michael Mirmak* Keysight Technologies Radek Biernacki Mentor, A Siemens Business Arpad Muranyi* Micron Technology Justin Butterfield*, Randy Wolff* SiSoft Walter Katz*, Mike LaBonte* Teraspeed Labs Bob Ross* Michael Mirmak convened the meeting. No patents were declared. Justin Butterfield took minutes. Review of Minutes: - Michael called for review of the minutes from the January 24 meeting. Mike LaBonte moved to approve the minutes. Randy Wolff seconded. The minutes were approved without objection. Review of ARs: - Mike to delete the last two rules in the I/O pin_name rules. - Mike noted we need to make sure this is in the latest draft. Bob Ross thought that this is done in BIRD189.5_draft16. Mike stated that we should double check. - Mike to post BIRD189.5_draft16. - Mike reported that this is done. Opens: - Mike noted that he has started inserting feedback and comments sent over email into BIRD189.5_draft17_v1 as comments. - Michael stated he received some verbal comments at the DesignCon IBIS Summit. - Bob noted he has an additional comment which he did not send out in email. BIRD189.5_draft17_v1 review: Mike noted that there are still some comments retained from the previous draft. Mike stated that he inserted the comments from Bob's emails in the appropriate sections. Mike also added Michael's comments regarding the Unused_port_termination subparameter. Mike also added a comment about defining the "N" in "N+1". Bob commented on page 31 there is a backwards reference to the I/O pin_name rules that have been deleted. The last sentence of the of the first paragraph mentions the rule that no longer exists. Michael asked if we can delete that sentence. Arpad Muranyi suggested to not delete the sentence without further discussion, as the EDA tool still needs direction on what to do in this case. Bob noted on page 7 in the I/O pin_name rules, the second and third bullets are not sufficient rules. He can think of conditions where the rules are followed, but the models are meaningless. Bob is concerned these rules along with the rules on page 27 are not sufficient. He stated that possibly we should mark both sides of the models with Aggressor_Only. Bob suggested on page 8 to remove the the "ref" terminals, Pullup_ref, Pulldown_ref, etc., from the first Rail terminal rule. He noted that this is replicated in two places. Bob commented that it is not stated that the PDN models must not step on each other. Mike stated that the general rule is for any pin we are looking for a circuit, we need to find exactly one circuit. He asked if this is only a problem for PDN models. Walter Katz stated that the rule is only for PDN models. Mike asked how we know if a model is a PDN model. Walter replied that a PDN connection goes from pin to pad to buffer for the rails, if not it is a reference. Bob thought a simpler way of defining a PDN is that it does not contain I/O signals. Walter noted that you could have PDN structures in the same models as the I/O signals. Bob noted that there are multiple cases of model types including the PDN and/or the I/O structures. Mike asked if we can go ahead and delete these "ref" terminals, since the text is technically incorrect as written. Bob replied that we can delete them, since this is not syntactically correct per Table 41. Randy asked about having the Buffer_Rail Terminal_type at the pin interface in the first Rail terminal rule. Mike commented that the three interfaces are being called out by the Pin, Pad, Buffer, and if we have a clause that states at the pin interface, we are talking about Pin_Rail. Bob agreed. Mike changed Buffer_Rail to Pin_Rail. Bob is concerned that the first Rail terminal rule only mentions pin_name, and it does not mention signal_name or bus_label. Mike thought we could add rules for those cases. Walter gave an example an example of DDR5 and SATA chip with different PDN models. Bob thought these should be in different Groups. Walter stated that might not be the case, and when the model maker generates these PDN models, they would typically do so for a slice of the package/chip. Looking at the pin makes it simple to prevent having the same net in more than one PDN network. Bob stated that we also have to consider bus_label cases. Arpad asked about a case from Micron, where there is a package model from pin to buffer and a decoupling model model between the buffer terminals. Randy thought this should be okay with the current syntax, since the decoupling model is connecting between Buffer_Rail terminals. Walter thought this should work, as it is not really a PDN model. Bob was not sure if we allow a model with only Buffer_Rail terminals, and he thought we had a rule that models had to go between more than one interface. Walter thought that there is no such rule. Walter thought we should we agree on the problem. Arpad stated he can draw up a diagram to illustrate the issue with the Micron decoupling model [AR]. Michael noted on page 23 that he is not sure all of the examples conform to the rules stating what Interconnect Models should contain. He would like to clarify these rules. Michael commented that for Sets and Groups it would be good to have some examples from previous Summit presentations better showing the meaning of these concepts. Michael stated that we need to make sure we are consistent with BIRD158.7 as per a verbal request from Radek. Bob thought that we are consistent with BIRD158.7. Next Meeting: The next meeting will be February 9. Mike moved to adjourn. Arpad seconded. The meeting adjourned without objection. Task List BIRD189.5 editorial additions/changes to be completed: