====================================================================== IBIS INTERCONNECT TASK GROUP http://www.ibis.org/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ====================================================================== Attendees from March 30 Meeting (* means attended at least using audio) ANSYS Curtis Clark* Cadence Design Systems Bradley Brim Cisco David Siadat Intel Corp. Michael Mirmak* Keysight Technologies Radek Biernacki*, Ming Yan Mentor Graphics Arpad Muranyi* Micron Technology Justin Butterfield*, Randy Wolff* SAE ITC Maureen Lemankiewicz, Logen Johnson Signal Integrity Software Walter Katz*, Mike LaBonte* Teraspeed Labs Bob Ross* University of Aveiro in Portugal Wael Dghais Michael Mirmak convened the meeting. No patents were declared. Michael called for comments on the minutes of the March 16 meeting. Arpad Muranyi moved to approve the minutes. Randy Wolff seconded the motion. No objections were raised and the motion carried. Michael called for comments on the minutes of the March 23 meeting. Radek Biernacki noted that the word “variable” was used instead of “viable”. Radek moved to approve the minutes with this change. Mike LaBonte seconded the motion. No objections were raised and the motion carried. No opens were raised. Michael noted that Brad Brim was not in attendance, so his presentation could not be reviewed. Michael reviewed draft 30 of the Interconnect proposal, starting with the Terminal_type qualifier table. Bob Ross noted concern regarding capitalization. He prefers “Buffer_I/O” as generic inclusive term. He also referred to his table for the Editorial Task Group referencing discussion. AR – Bob to update capitalization in table, which the team will use as a template for rest of the draft. Walter Katz moved to approve Bob’s proposed Puref, Pdref (capitalizing only first letter) approach throughout the draft document, with exception of “I/O”. Arpad asked about the rest of the IBIS document. Bob replied that there is no conflict with the rest of the table. Arpad prefers the use of double-capitals, but is willing to be outvoted. Randy noted that the terms cannot be consistent with the rest of the specification, as these are mostly new. Randy seconded Walter’s motion. Arpad suggested a person by person vote, which Walter made into a formal motion for a roll-call vote. Arpad seconded the motion. Curtis Clark asked about Arpad’s preferences. Arpad suggested “PUref” and “PDref”. The vote was conducted as follows: ANSYS - abstains Intel Corp. - yes Keysight Technologies - abstains Mentor Graphics - no Micron Technology - yes Signal Integrity Software - yes Teraspeed Labs - yes The motion carried. Corrections will be made to the document, table. Bob suggested that the table header needs clean-up. Draft 31 will include these changes. Bob noted that the Pins, Pads, Terminals section was reviewed offline with Walter. Michael asked about bus_label usage elsewhere in the document. Radek asked whether bus_label was consistently used with underscore. Bob responded that we weren’t that careful in observing underscores vs. spaces in usage. Michael suggested using the phrase “used elsewhere as” in [Pin Mapping] and elsewhere for “bus_label” and “bus label” as acceptable alternatives. Walter suggested doing this for the whole document regarding underscore. AR - Michael to develop a generic/global phrase. Randy notes that the phrase “Interconnect model” instead of “Interconnect Model” is used in the sentence starting with “Any one pin…”. Bob notes that this is inconsistently used throughout the document. Walter noted that bus_label is an optional column header for [Die Supply Pads], but this is not shown in the very first example. Bob suggested that the keyword is defined later than the example appears. Arpad suggested that we need additional examples of Die Supply Pads showing bus_label. Walter replied that one can have bus_labels without corresponding connections in Pin Mapping. Michael asked about shorted bus_labels; Walter agreed this was possible. A signal_name can define a bus label. Arpad asked whether, depending on which column, the shorting follows the column. Walter replied that shorting follows the model. Radek asked whether we have a rule regarding VDD as bus_label and signal name. Bob replied that one did exist above. Walter added that one cannot have two Terminals that share the same pin, as noted above. Bus label partitions different signals into sections, for example, dividing die pads on VDD into different sections. Radek summarized this as, for example, one terminal can be VDD1, one terminal can be VDD. Arpad asked whether one can use VDD1, VDD2 etc. for pullup_ref in the Pin Mapping columns. Walter replied that one can associate a signal_name or bus_label with a given pin; bus_label and signal_names are associated in three ways, one of which is to put a bus label or signal name on a POWER or GND pin. Bob noted that the rules for Die Supply Pads may need to be moved under [Pin Mapping], [Bus Label]. Walter observed that one bus label is prohibited under multiple signal names. AR Walter - send e-mail regarding bus label rules The team noted that the definition of [Die Supply Pads] has already been moved above the examples, so no document reordering is needed. Bob noted that [Begin Interconnect Model] is quite complex. A shorter instance is needed. Next time, the team will take up Brad’s proposal and, time permitting, Draft 31. Arpad moved to adjourn. Curtis seconded the motion. The meeting adjourned.