====================================================================== IBIS INTERCONNECT TASK GROUP http://www.eda.org/ibis/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ====================================================================== NEXT MEETING Wednesday, April 30, 2014 8 AM US Pacific Time Objective: produce a unified package improvement proposal (BIRD) for consideration by the IBIS Open Forum that satisfies industry package modeling requirements Agenda: 1) Roll call 2) Call for patent disclosures 3) Opens 4) Review of ARs 5) Discussion and call for vote on syntax proposals for IBIS package/on-die interconnect treatment You can use computer audio without dialing into the number below by simply using the Lync application on an audio-enabled device; this helps identify individual speakers as well as noise sources. ......................................................................................................................................... Join online meeting https://meet.intel.com/michael.mirmak/LBTN4Q27 Join by Phone +1(916)356-2663 (or your local bridge access #) Choose bridge 5. Find a local number Conference ID: 1448569529 Forgot your dial-in PIN? | First online meeting? [!OC([1033])!] ......................................................................................................................................... --------------------------------------------------------------------- MEETING MINUTES Wednesday, April 23, 2014 Attendees denoted by * Agilent Technologies - Radek Biernacki* Altera - David Banas* Cadence Design Systems - Brad Brim* Intel - Michael Mirmak*, Robert Titus* Mentor Graphics - John Angulo, Arpad Muranyi*, Andrey Matvienko Micron Technology - Justin Butterfield*, Randy Wolff* Signal Integrity Software - Walter Katz* Teraspeed Consulting Group- Bob Ross* No patents were declared. Rob Titus introduced himself. He started at Intel as an IC designer, but now has been in a business organization for 6 years and Intel's Si2 TAB representative for 2 years, involved in 3D IC. He is open for questions about Si2 TAB. During opens, Michael Mirmak reported that the first meeting of the IEEE P2401 working group would be Thursday evening/Friday morning April 24/25 (meeting is Friday morning, Japan Standard Time). Brad Brim asked whether he should report back on developments in this meeting, as he will be attending the P2401 session. He may attempt to be a bridge between the organizations; however, his views may be Cadence-specific and may be controversial. Arpad Muranyi suggested that any particular meeting of P2401 might just be on a specific topic; can we invite their representative to our meetings? Brad responded that high-level information is already “out there.” He suggested that a P2401 representative be invited to come to the Open Forum. Brad noted that the group is dedicated to LSI-Package-Board (LPB) technologies, or how to assemble systems to share data between EDA simulation tools, including defining a set of protocols and standards. This goes beyond earlier MCP format proposals, as it communicates layout formats and constraints, includes chip and package models, and indicates what information can be passed back and forth between them. Walter Katz stated that he has been gathering information on this effort himself, as a person of interest. He expects that, in the future, there will be ways to extract IBIS package information from these databases. Michael will contact Fukuba-san to establish whether P2401’s efforts can be summarized for the IBIS Open Forum. Arpad summarized the work done in the last meeting: he showed Walter’s and Randy Wolff's examples implemented according to the BIRD 163-165 approach. Walter and Arpad's proposals are highly similar in their features for describing interconnects. The intent or target is the same, and no feature differences are desired between them. The differences are entirely in terms of syntax. The essential choice is whether to start with new keywords, or use existing keywords. Walter agreed with this description, and had sent out an e-mail summarizing this issue to the list before the meeting. The question is whether the approach shall use [Define Package Model] or [External Circuit]/[Circuit Call]. Brad pointed out that the proposals are also defining on-die interconnect, as well as package models. Walter's proposal maintains mutual exclusivity. Walter stated that the [Define Package Model] definition connects from the package to the buffer. No pad is currently defined in [Define Package Model]. Bob Ross noted that Walter's proposal is broader than just package models; this is also the same with Arpad's proposal. Walter responded that there was some indirection with the External Circuit/Circuit Call approach. Michael asked, recalling a question in an earlier meeting from Radek Biernacki, about supporting both proposals in the same specification. Bob stated that he would oppose this, as would Arpad, for reasons of complexity. Radek stated that he was interested in order of precedence between any new vs. existing keywords. He had heard some discussions of this in the past, and agreed with Bob about the undesirable complexity of simultaneous support of the proposals. Bob noted that Walter's approach links to [Model] in some manner, so models written in this approach can link to [External Model] for multi-lingual constructs. Arpad wonders about use of "package" as a term, if the approach includes on-die interconnect. Currently, [External Model] is between pins and buffers. The specification does not permit insertion, under [Model], of structures between pins and pads. Walter moved that the Interconnect Task Group recommend and pursue the [Define Package Model] approach. If the motion fails, then the team will pursue the [External Circuit]/[Circuit Call] approach. Arpad seconded the motion, with a clarification question. Radek asked how the new package proposal ([External Circuit] proposal) would be reconciled with Pin, Package, etc. rules. Arpad replied that, if the new structure is connected the same way as an old one, the new one is in effect, only. [Circuit Call] makes the instantiations. Radek asked whether this meant that the user or tool would have to parse [Circuit Call]s to figure out what is connected to what. Walter clarified that, in his proposal, one could define connections on the pin, or using [Define Package Model]. Nothing in the current standard defines the order of precedence of package model format *within* Define Package Model; there are mutual exclusivity rules. See page 137 for definition. Originally, Walter used a different keyword, but has since adopted the existing [Define Package Model] keyword. Bob stated that the advantage of Walter's original proposal was a "clean break" with previous concepts. Using existing keywords could intermingle existing rules/concepts. Per Walter’s motion, a vote is pending for next time. Walter to send out a draft BIRD showing implementation details. Arpad moved to adjourn; Brad seconded.