================================================================================ IBIS INTERCONNECT TASK GROUP http://www.ibis.org/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ================================================================================ Attendees from June 12, 2019 Meeting (* means attended at least using audio) ANSYS Curtis Clark Cadence Design Systems Bradley Brim Intel Corp. Michael Mirmak* Keysight Technologies Radek Biernacki Mentor, A Siemens Business Arpad Muranyi* Micron Technology Justin Butterfield*, Randy Wolff* SiSoft Walter Katz*, Mike LaBonte* Teraspeed Labs Bob Ross* Michael Mirmak convened the meeting. No patents were declared. Justin Butterfield took minutes. Review of Minutes: - Michael called for review of the minutes from the May 29, 2019 meeting. Randy Wolff moved to approve the minutes. Walter Katz seconded. The minutes were approved without objection. Review of ARs: - Bob Ross to prepare a presentation on the EMD bus_label issue. - Walter commented he and Bob have discussed many issues including the bus_label topic. Walter would like to review the changes that they agreed to in the EMD BIRD. There are two issues they do not agree on, and we will need to discuss those. He would also like to review the email he sent out. Bob noted he has some presentation slides on the issues. Opens: - Mike LaBonte noted the Eric Bogatin article on Touchstone in the SI Journal may not come out for a few more weeks. He has results from the Touchstone survey to share. Touchstone Survey Results Review: Mike started a document that includes a cover page with some introductory information and highlights of the survey results. He has created an email list, touchstone@ibis.org, for comments on Touchstone. Mike noted an issue with the PDF report, where the plots are blurry. Michael suggested he could concatenate the PDFs together. Bob stated he could do this as well. Mike stated he will send the document to Bob for help with this. Michael asked who the audience will be for the results document and if we will post it. Mike thought we should send it out to the same groups we sent the survey. Michael suggested to keep the audience in mind while preparing the document. Mike stated he will hold off sending it out. Michael asked what type of feedback Mike is looking for and what is the timeline. Mike replied it would be good to get this out in about a month, and he would like all types of feedback. Michael suggested we should close off any feedback in two weeks and try to get this out for next month's IBIS Open Forum meeting. Michael suggested to send the cover page out to the reflector. He would like to have the document ready by July 12. Mike to send out a draft of the Touchstone survey document for review [AR]. EMD and Bus Label: Walter shared an email detailing the types of EMD modules. He noted all types are designed in 2D CAD systems. These CAD systems have a list of pins and each component has a reference designator. There is a list of CAD nets. Arpad Muranyi asked if these nets include series resistors and capacitors. Walter replied these are not included. Michael asked if this email could be used as an introduction to EMD. Walter stated it could. Walter noted there are two types of CAD Nets: I/O and Rails. Typically, one connector is considered the external connection. Walter detailed how EBD and EMD files would be generated from the CAD database. Michael asked if the issue is that there should be one main connection point. Walter replied this is the case for EBD, but for EMD we want to consider all nets, even connections only between components. For EBD, the only access you have is at the connector, but for EMD, you can have interconnect models between components. Bob stated it is not clear why we need this functionality in EMD. Walter gave an RDIMM as an example where you would want to model the interconnect between the Register and the DRAM. Bob agreed we do want this functionality, and that it is not currently supported in EBD. Bob suggested this could be done with the terminal naming. Walter stated this could be possible for I/Os but not for rails. Walter shared the latest EMD draft. Bob noted there is a mistake in the tree diagram as [EMD Designator Map] needs to go under [Define Module]. Walter would like to have separate [EMD Pin List] and [Component Pin List] keywords. Under [EMD Pin List], we added bus_label functionality. The first field in the pin list is the pin number, the second field is the signal_name, and the third is the signal_type. We have added a fourth column with the bus_label information for rails. These rules are cloned for component pins. Bob would like to change signal_type to path_type, but that is an issue we need to discuss. Walter noted there are other issues to resolve. Arpad asked about the "NC" designators which were removed. He commented variable length lines are harder to parse. Bob stated he is okay with having "NC" for no connect pins. Walter stated we can change this back to include NC in the signal_name. Arpad suggested to not have a variable length syntax, as it makes adding additional features in the future much more difficult. Walter summarized the open issues: 1. signal_type vs. signal_path 2. allowing multiple modules 3. variable length of the pin list fields 4. one pin list keyword vs. two pins list keywords Bob noted his presentation has some details on these issues. Next Meeting: The next meeting will be 6/19/2019. Mike moved to adjourn. Arpad seconded. The meeting adjourned without objection. ================================================================================ Bin List: EMD Comments to be Resolved: 1. Clarify the meaning of signal_type 2. File format structure 3. Number of [Module] keywords allowed per EMD file. 4. Should bus_labels be allowed? IBIS-ISS Parser: - IBIS-ISS parser scope document