====================================================================== IBIS INTERCONNECT TASK GROUP MEETING MINUTES http://www.eda.org/ibis/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconnect/ ====================================================================== Wednesday, August 14, 2013 8 AM US Pacific Time Agenda: - Attendees - Call for patents - Agenda and Opens - What is the meaning of the Si2 specifications recently released to the IBIS Interconnect community (Brad Brim is willing to present on this)? - Resolving the path of IBIS between EMD and BIRD 125 and related BIRDs, and how IBIS-ISS will interact with all of these - Next Meeting Dates/Agenda ====================================================================== Attendees: ---------- (* denotes present) Agilent - Radek Biernacki* Ansoft - Denis Soldo Cadence Design Systems - Terry Jernberg, Brad Griffin, Dennis Nagle I/O Methodology - Lance Wang Intel - Michael Mirmak Mentor Graphics Corp. - John Angulo, Arpad Muranyi* Micron Technology - Justin Butterfield, Randy Wolff* SiSoft - Walter Katz*, Mike LaBonte* Teraspeed Consulting Group - Bob Ross* ======================================================================== No patents were declared. ======================================================================== Opens: Arpad asked about quorum requirements. Mike said the quality group requires three. Walter said work done here probably would go to the ATM group anyway. ======================================================================== BIRD 125: Walter said BIRD 125 provides a means to interface to IBIS-ISS subcircuits. BIRD 145 gives RDL as examples, indicating an intent toward on-die modeling. Arpad said that BIRD 145 is not related to interconnect. Walter disagreed. Radek noted that discussions of BIRD 145 should have Cadence present. Walter said we need to resolve the on-die model issue, but not today. Si2 Chip Package Interface Protocol: Walter showed the Si2 Chip Package Interface Protocol (CPIP) document. He noted that it describes some complicated setups and has good graphics. The syntax example on page 17 looks like SPICE. It appears to be mappable to Model Connection Protocol (MCP), making use of physical X/Y points as nodes. Walter described the different styles of connectivity declarations for CPIP, EMD, MCP, and IBIS B elements in SPICE languages. Using the Si2 protocol a part with 50 pins would require 50 subcircuits. With other coupled pin combinations considered very many subcircuits might be required. Clever software might pick and choose from available subcircuits to fill the needs of any particular simulation. Walter explained that MCP and CPIP convey information using SPICE comment lines. MCP begins bottom-up with subcircuits, declaring the connect pins. EMD starts top-down with pins and calls subcircuits. Walter felt it would be difficult for EDA tools to implement MCP, and that EMD is somewhat compatible with CPIP. Randy asked if IBIS-ISS could have CPIP information above it. Walter said some of the max voltage and current constraints might be easily added. He also believed it would help to have Brad Brim available to explain some things. Walter wondered about the handling of length. Bob pointed out that a Length_Unit is in the header. Walter noted that there can be problems combining circuits using a mix of inch and micron units, and CPIP helps with that. Arpad asked if properties in CPIP are inherited by lower subcircuits. Walter said they are. Arpad asked what the CPIP X/Y coordinates actually correspond to. They are relative to some package point. Walter noted that combinations of X/Y and netname, pin type, etc., can be used to determine connectivity. Arpad said in our discussion our goal was to describe packages, and wondered if this would solve that. Walter said that is a different problem and that discussion of CPIP does not directly help. He said it might help chip companies to produce package models, however. Randy was not sure about that but saw no conflict. Radek said Brad's introduction of this referenced Touchstone files. Walter said this only describes subckt terminals, therefore it requires a language with subckts. Radek asked if there is some sense that one item is inside another. Walter said only connections are described, the connected items may be peers. Walter said that Brad had said it would be easy to use this to generate EMD. Walter asked to discuss BIRD 125 vs. EMD-style in the next meeting. Arpad asked Mike to send minutes to ibis-macro as well as ibis-interconn. ======================================================================== Next Meeting: Wednesday, August 21, 2013