================================================================================ IBIS INTERCONNECT TASK GROUP http://www.ibis.org/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ================================================================================ Attendees from December 4, 2019 Meeting (* means attended at least using audio) ANSYS Curtis Clark Cadence Design Systems Bradley Brim Intel Corp. Michael Mirmak* Keysight Technologies Radek Biernacki Mentor, A Siemens Business Arpad Muranyi* Micron Technology Justin Butterfield*, Randy Wolff* SiSoft Walter Katz*, Mike LaBonte Teraspeed Labs Bob Ross* Michael Mirmak convened the meeting. No patents were declared. Justin Butterfield took minutes. Review of Minutes: - Michael called for review of the minutes from the November 20, 2019 meeting. Randy Wolff moved to approve the minutes. Walter Katz seconded. The minutes were approved without objection. Review of ARs: - None. Opens: - Michael noted we will cancel the meetings on December 25 and January 1. - Michael stated we need to discuss adding a terminology list and definitions. EMD Draft 25 review: Walter noted a comment from Arpad Muranyi on page 11 asking if it is possible to have anything other than an EMD in an .emd file. Walter thought we had allowed EBD files in EMD files. Bob Ross thought we had decided to not allow .ebd files in an .emd file. Randy agreed we decided to not allow .ebd. Walter noted the second comment from Arpad on page 11 is about recursion. Arpad stated he was commenting on the wording of the sentence. Walter suggested to change the word "component" to "designator". Arpad asked if this is trying to say that we can nest .emd files. Walter noted this is saying that an .emd can contain IBIS files or EMD modules. Randy noticed, in the Description of the [EMD Designator Map], we may want to word this differently to consider that a module would be in an .emd. Bob commented that a module is not a direct mapping to an IBIS keyword like component is. Arpad suggested to change the wording of the sentence: "A designator that is an .emd file, can itself have an EMD component." Walter asked if there were any suggestions for the correct term for recursive. Arpad noted a grammar problem with the phrase "the any". Randy suggested that an .emd file may not reference itself in the designator map. Walter noted EMD can also not reference something which could back references itself. Walter suggested to say "An .emd file may not reference itself." Arpad suggested to add the phrase "directly or indirectly" to the sentence. Walter noted the next comment from Arpad on page 12 is related to a sentence which uses "and then". Walter suggested to change the sentence to rephrase and break up the sentence into two sentences. Bob suggested to change "must" to "shall". Arpad noted there was another occurrence of this issue. Randy noted this is the same sentence. Walter changed the second case in the same way. Walter noted the next comment on page 14 is related to not connecting to Touchstone files, rather we connect to Touchstone models. Arpad noted we are making connections to terminals. Walter changed the phrase to "subcircuit terminals and Touchstone terminals". Arpad asked if we are talking about the terminal lines or the terminals of the model. Walter replied these are the same thing in his view. Walter stated the next comment is to change the sentence: “Module pin_names shall be the pin name in the module [EMD Pin List] section.” Randy asked if the names must match. Arpad suggested to change to the phrase "shall be present". Bob suggested to change "must" to "shall". Bob asked if we are talking about Pin_I/O terminals and if the next paragraph expands this to pin_name, signal_name or bus_label for Pin_Rail terminals. We need to make it clear the next paragraph refers to Pin_Rail. Walter commented the major change in this draft is in the rules section. Several sections have been deleted. And, there are rules about what is supported for terminals that can short pins. Walter deleted Bob's comments, as these are now addressed. Bob noted the rules for EMD pins and designator pins are now merged since the rules are the same. Walter stated there was a comment from Arpad on page 28, which is asking "What happens if there is a single pin_name of VDD at an Interface?" Walter noted this is up to the EDA tool, and it could be the case that all the current will go through one pin of the model. Walter stated the model maker will have to be careful to set this up correctly. Bob commented we also need to account for the case of not having a power aware simulation. Arpad thought it is okay to remove the comment for now. Walter noted he added some examples which need to be carefully reviewed. Bob noted one of the examples had two sets of pins. Walter stated this should now be fixed. Bob noted a section of text that mentioned a rail may be documented by a list of pins. Walter suggested to point out the exact location later. Bob noted this is in item #2 on page 29. There is an omission of bus_label that should be considered. Walter will send out draft 26 [AR]. Next Meeting: The next meeting will be December 4. Bob moved to adjourn. Arpad seconded. The meeting adjourned without objection. ================================================================================ Bin List: EMD Comments to be Resolved: IBIS-ISS Parser: - IBIS-ISS parser scope document