====================================================================== IBIS INTERCONNECT TASK GROUP http://www.ibis.org/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ====================================================================== Attendees from December 14 Meeting (* means attended at least using audio) ANSYS Curtis Clark Cadence Design Systems Bradley Brim Cisco David Siadat Intel Corp. Michael Mirmak* Keysight Technologies Radek Biernacki, Ming Yan Mentor Graphics Arpad Muranyi* Micron Technology Justin Butterfield, Randy Wolff SAE ITC Maureen Lemankiewicz, Logen Johnson Signal Integrity Software Walter Katz*, Mike LaBonte* Teraspeed Labs Bob Ross* University of Aveiro in Portugal Wael Dghais Michael Mirmak convened the meeting. No patents were declared. Mike LaBonte took minutes. Review of Minutes: - Michael called for review of the minutes from the December 7 meeting. Bob Ross moved to approve the minutes. Arpad Muranyi seconded. The minutes were approved without objection. - There was some discussion of what our quorum number should be, and whether votes were appropriate with only four attendees. No conclusion was reached. Review of ARs: - Michael Mirmak to submit draft 44 of the Interconnect BIRD. This was done. Michael is also preparing drawings for the new chapter 12. - Michael Mirmak to summarize existing rules of precedence in the IBIS specification. This is in progress. Michael said we might want to have a separate chapter for rules of precedence. Bob said that should be near the end. He described some thoughts on hierarchical rules. Mike LaBonte moved to drop the AR. Bob Ross seconded. Without objection the AR was dropped. Opens: - Bob noted that the web link to his Table XX document was broken. AR: Mike LaBonte to fix Table XX web link. Interconnect BIRD draft 44: Michael showed Interconnect BIRD draft 44 and described the changes made to it. Bob said his requested change could appear under Other Notes. He said he was concerned that the example flow may be EDA vendor specific. Also there was an organization problem, it makes forward references. For example Pin_I/O is used in the example flow but it has not been introduced yet. Bob felt it should be moved toward the end or deleted entirely, because it is only advisory. Mike felt that showing an example of how syntax is used was helpful in understanding it. He said we always try to avoid forward referencing, but it is not always possible to avoid completely. Michael said we have to be clear that EDA vendors have freedom in how they implement it. Walter said the word "strongly" should be removed from page 18. Bob said The center of gravity in the document was about groupings, and we were showing only one kind. Michael asked if there was a way to resolve the forward referencing. Walter suggested the example flow could be in a separate place, not in IBIS itself. Mike suggested it might be in the BIRD introduction. We agreed to this. AR: Michael to move Interconnect BIRD flow example to BIRD introduction. Michael asked if the diagram on page 9 was correct. Bob said there could be additional figures without die pads and with collapsed rail terminals. Arpad noted that the figure is inconsistent in the use of black lines. Michael asked if we want the first figure to just show that there are die pad terminals. Bob said yes, but the other point is they are not required. AR: Michael to fix inconsistent black lines in Interconnect BIRD figures. Michael asked how close we were to being done with the BIRD. Mike asked if there were comments still in the document. We reviewed comments and deleted some. Michael noted that we had decided to drop the interconnect rules of precedence AR, but that section was already in the BIRD and it should exist somewhere. Bob said we already had similar rules somewhere in IBIS. Michael noted that any existing rules would not mention [Interconnect Model Set Selector]. Walter suggested that precedence could be described outside of IBIS. Mike said we might only need to state in the [Interconnect Model Set Selector] section that it supersedes [Package Model], consistent with what the other keywords do. Arpad noted that it would a problem if the model maker expects it to work one way but a tool does otherwise. Michael said there was no way to enforce what the EDA tool does. Bob suggested saying that we "expect but do not require" an order of precedence. Mike suggested saying that [Interconnect Model Set Selector], if present, would be more accurate. Bob said "detailed" would be better than "accurate". AR: Michael find proper place and language for interconnect rules of precedence. The next meeting will be January 4, 2017. Mike LaBonte moved to adjourn. Bob Ross seconded. The meeting adjourned without objection.