====================================================================== IBIS INTERCONNECT TASK GROUP http://www.ibis.org/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ====================================================================== Attendees from December 16 Meeting (* means attended at least using audio) ANSYS Curtis Clark* Cadence Design Systems Bradley Brim Cisco David Siadat Intel Corp. Michael Mirmak* Keysight Technologies Radek Biernacki* Mentor Graphics Arpad Muranyi* Micron Technology Justin Butterfield*, Randy Wolff* SAE ITC Maureen Lemankiewicz, Logen Johnson Signal Integrity Software Walter Katz, Mike LaBonte* Teraspeed Labs Bob Ross* University of Aveiro in Portugal Wael Dghais Michael Mirmak convened the meeting. No patents were declared. Radek Biernacki moved to approve the minutes with changes noted below. Arpad Muranyi seconded the motion. The minutes were approved without objection. Changes discussed on the reflector include: Regarding “Radek Biernacki replied that using multiple power pins may be misleading”, [the] comment was about “connecting” all the symbolic (dashed lines) connections at one point. Regarding “Arpad suggested that the tool and user can always rename nodes for connection purposes”… [Arpad] was trying to say that tools (or users) can generate probe statements that reach into the depths of the subcircuits to probe a node inside a subcircuit even on a deeper level. In [Synopsys] HSPICE you would do it like this in a top level netlist: V(X1.X2.X3.NodeName) where X1, X2, X3 are (nested) subcircuit instance names in the netlist. Michael noted that meetings would not be convened during the last two weeks of 2015. Regarding ARs, Mike LaBonte noted that half of his ongoing AR for drawings is complete. Bob presented on his [Pin Pad Map] Proposal, version 2. He clarified the meaning of X, Y, Z in the Terminal qualifier table. He noted that “a” and ”b” in the proposal diagrams are pad names. Bob has added tables, on page 10, to show terminal selection options. Arpad noted that it seems like we are bogged down in syntax discussion again. The discussion harkens back to the BIRD125 definition of connectivity. This makes only minimal changes from the original specification. Bob noted that he prefers defining a new keyword over modification of a previous/existing keyword. Michael asked about the Pin Mapping and Pin Pad Map relationship on page 5. Is Pin Mapping required to define bus labels? Mike responded that Pin Mapping is only needed when you define/need bus labels. Bob stated that one does not need to define supply labels in Pin Mapping. I/O buffer interconnections and bus labels are defined in [Pin Mapping]. [Pin Pad Map] is only for power and ground connections. Mike replied that approach is good, because it may open questions about the relationship to the industry MCP approach otherwise. Randy and Bob suggested that a separate package-to-pad connections discussion be held, regarding the diagram on page 13. Mike noted that multiple bus labels are assigned to one signal – is this a feature or a pathological case? Bob responded that he can illustrate possible on-die distributions of power. Could be pathological but it exists in IBIS. Nowhere in the Interconnect proposal do we deprecate IBIS. Mike replied that we don’t have to extend the uses either. Next time, Mike will review his drawings. Bob commented that, in the current drawings, it seems as if the bent lines imply that all power/ground connections converge on a point, then split back out. Mike will deal with that offline before the next meeting. Additionally, for the next meeting, the conflict between die pad and bus labels must be resolved. If time permits, the most recent draft of the proposal will be reviewed. Radek moved to adjourn the meeting. Mike seconded the motion. The meeting adjourned.