DATE: December 19, 1995 SUBJECT: 12/15/95 EIA IBIS Open Forum Meeting Minutes VOTING MEMBERS: AT&T Global Info Solutions Dave Moxley* Cadence Design Sandeep Khanna, C. Kumar* Contec CAE, Ltd. Dileep Divekar* HyperLynx Kellee Crisafulli IBM Jay Diepenbrock INCASES Werner Rissiek, Olaf Rethmeier Intel Corporation Stephen Peters*, Will Hobbs, Arpad Muranyi*, Derrick Duehren Interconnectix, Inc. Bob Ross* Meta-Software Les Spruiell, Mei Wong, You-Pang Wei, John Sliney Motorola Ron Werner National Semiconductor Syed Huq*, Atul Agarwal, Cheng-Yang Kao NEC Hiroshi Matsumoto, Eldar Yazbashevz Quad Design Jon Powell*, Chris Myles, Chris Rokusek* Quantic Labs Mike Ventham Tanner Research, Inc. Scott Wedge, Ed Miller, Peter Parrish Texas Instruments Roger Cline, Ben Andresen, Sri Jandhyala*, Tareq Shahwan* Thomson-CSF/SCTF Jean LeBrun UniCAD Canada Ltd. Stephen Lum VLSI Technology Dick Ulmer*, Sung Oh Zuken-Redac John Berrie OTHER PARTICIPANTS: AMP Hank Herrmann* ARPA Randy Harr Anacad Steffen Rochel Ansoft Henri Maramis Atmel Corporation Dan Terry Cadlab Ralf Bruning CFI Ron Christopher, Don Cottrell Digital Equipment Corp. Barry Katz EIA Patti Rusher* High Design Technology Michael Smith, Dr. Ing. Cosso Hewlett Packard Tom Langdorf, Karl Kachigan, Henry Wu Integrated Silicon Systems Eric Bracken Intergraph Ian Dodd, David Wiens, Walter Katz IntuSoft Charles Hymowitz LSI Logic Corp. Satish Pratadneni Mentor Graphics Ravender Goyal, Greg Doyle Micron Technology Brian Johnson MicroSim Arthur Wong North Carolina State U. Steve Lipa, Michael Steer OptEM Engineering, Inc. Benny Leveille, Ken Ehn Pacific Numerix Paul K. U. Wang Symmetry Martin Walker Synopsys, Logic Modeling G. Bill Lattin Univ. of Illinois, Urbana Raj Mittra Zeelan Technology George Opsahl, Hiro Moriyasu (Independent) Bob Ward In the list above, attendees at the meeting are indicated by *. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Bridge Number Reservation # Passcode 1/12/96 (916) 356-9200 2-41860 1918954 All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out 7 days before each open forum and meeting minutes out within 7 days after. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the reservation number and passcode. NOTE: "AR" = Action Required. -------------------------------- MINUTES ------------------------------------- INTRODUCTIONS Jon Powell chaired the meeting. Sri Jandhyala and Tareq Shahwan joined us from Texas Instruments, Sherman Texas. They have been providing IBIS models directly to customers on a per request basis including models for JTAG devices and bus drivers. Models provided include components in the LVT and ABT series. They are working on GTL models. There is still discussion on how best to distribute IBIS models. EIA MEMBERSHIP AND TREASURER'S REPORT The membership is the same and the treasury has been reduced by a payment for parser code development. We estimate $7,000 to $8,000. MINUTES REPORT, MISC. The December, 1995 Minutes National Semiconductor Web Site has been corrected to read: http://www.natsemi.com Two additional points by Hank Herrmann on the BIRD31 discussion are added to the minutes. (1) Connector models will be discussed at the Face to Face meeting, although specific items of discussion have not been identified. (2) "not-fully-populated busses" could be modeled by separate models rather than by partial models as the BIRD suggests. The minutes will contain the more detailed discussion which Hank has sent to the reflector. MISCELLANY/ANNOUNCEMENTS None. PRESS AND WEB PAGE UPDATES "Meeting Timing and Signal Quality Requirements" in Printed Circuit Design, December 1995 by Rod Strange and Peter Suaris mentions IBIS. The web page discussion documented below occured at this time. NEW MODELS Syed Huq reports that some updated versions of National models have been submitted to Michael Steer. Arpad Murayni reports that information concerning the Intel 82439HX has been sent to Michael Steer concerning IBIS model availability under NDA. OPENS FOR NEW ISSUES Egg9 - Transit Time Modeling. EIA-656 ANSI RATIFICATION Patti Rusher reported that on December 13, 1995, IBIS has been formally ratified by ANSI as ANSI/EIA-656. A motion was made by Bob Ross and seconded by Jon Powell to forward ANSI/EIA-656 to IEC (International Electrotechnical Commission) working group TC-93 on Design Automation as the first step toward international ratification. Motion was approved by unanimous vote. Patti will forward the document at a January meeting. She expects the standardization process may take up to 3 years. EIA/IBIS 1996 MEMBERSHIP Patti Rusher will send out EIA/IBIS 1996 membership renewal forms in early January instead of December. EIA WEB UPDATE Syed Huq has been working with Patti Rusher and Steven Malone on Web page details. They are making excellent progress and will report on the reflector when the Web page is up. All documents are approved. Contents of the Web page include: Intel EDN article Links to vhdl.org for IBIS information including Models IBIS Specifications Roster FAQ's (Frequently Asked Questions) Links to Member Companies Home Pages. Syed needs to know which companies are member companies. Jon Powell has logo information and Logos from 12 companies. Since HP nor NCSU are not official members, their logos cannot be used. TI is planning to submit a logo, (and sign the EIA/IBIS permission letter form set by Patti Rusher), but at this time does not need a link to the company home page. Links can be provided later. Jon Powell reported that the following companies have supplied logos: Interconnectix, ATT-GIS, National Semiconductor Quantic, Contec, Hyperlynx, Incases, Intel, Unicad, Quad Design, and Cadence. FACE TO FACE MEETING Syed Huq has made arrangements for National to host the meeting on Monday, January 29 before SuperCon96. So far he has 15 confirmations. Lunch and snacks will be provided along with the meeting place. For those who are staying over, plan on a celebration dinner together. Syed will send another reminder giving more details on location. TI indicated that they may send one or two people. Syed has made some other semiconductor vendor contacts. While details will be firmed up later, Intel and National are expected to participate on the model development/model validation topic. Other topics with details to be firmed up later are expected to cover connector modeling, stored charge modeling, feedback mechanisms, TTL measurements, adding more timing specifications, hysteresis, bus keeper circuits, etc. At Design SuperCon96 on January 30 - February 2, there will be at least two presentations by National Semiconductor and one by Quad Design which will refer to IBIS. MODEL USAGE TRACKING This issue will be dropped until there is further proposals by vendors. National's Model listing on their Web site links directly to vhdl.org so that only a single library is managed. Jon Powell found a Web site which appeared to register participation. He will forward details to Syed Huq. GOLDEN PARSER UPDATE Several errors have been reported by Chris Rokusek to Bob Ross. One of them will lend itself to a specification clarification BIRD since the ibischk2 is functioning correctly. These problems will be sent to Paul Munsey for an update expected early next year. AR - Anyone finding Parser bugs submit them to Bob Ross. Include a test case, if possible. SPICE TO IBIS VERSION 2.1 Bob Ross reported that a crash bug found by Altera has been sent to NCSU on s2ibis-v2.091 (a Beta version). WINIBIS (NEW DISCUSSION) The Hyperlynx supplied utility was discussed. Bob Ross reported success in using it on Windows 3.1. Dave Moxley and others reported problems bringing it up on Windows NT. It gives a similar error to Windows 3.1 when the latest Win32S is NOT loaded. The action item is to contact Kellee Chrisafulli directly. EGG8 - PHYSICAL PACKAGE DISCUSSION No discussion. BIRD31 - CONNECTOR MODELS Some discussion occured and Bob Ross still plans to submit some examples to the reflector. Bob indicated that the required keyword [Description] for the expanded [Define Package Model] extension could be used to place any edge rate or bandwidth limitation requested by Hank Herrmann. Jon Powell raised the question regarding what EDA vendors are supposed to do with this information. BIRD28.3+ PACKAGE MODEL ENHANCEMENT C. Kumar has sent a proposal to Stephen Peters for early review before sending it out as a BIRD. EGG6 - TTL and CMOS Jon Powell reported that there exist counter-examples for all proposed methods to distinguish the technologies from the data itself. However, even though the transition mechanisms are different, he is thinking that the test load to get the dynamic parameters are a more important factor. So no change in the Specification may be needed. If he discovers some test load set that works well, he will supply the recommendations. EGG9 - HANDLING STORED CHARGE Bob Ross discussed EGG9 and reflector comments. He agrees with Jon Powell that RS is important. Jon indicated that it may not be a factor if RS is less than 4 ohms. This needs to be validated. The issue is that the transit time capacitance is modeled in parallel with the intrinsic diode, to the time constant remains constant. When the IBIS Clamp table is used, the effective RS is also included. This makes the time constant vary with forward diode currents, and may cause different effects. Since the IBIS Clamp table can represent a clamping circuit instead of just one diode or transistor, the notion of an effective TT is put forth. It may be derived indirectly - supply the TT that matches the desired performance, as opposed to trying to use the TT in a Spice model or obtained directly. For background, Bob indicated that other approaches are possible for this problem. (1) A complete simplified verion of the diode equation used by Spice could be added (the set of parameters would be specified to describe this diode) and the Clamp tables would be difference currents from the measured IV characteristics. (2) Or a best fit diode equation could be extracted form the tables to estimate RS and intrinsic diode, although experience indicates that this does not always give a reasonable estimate. This will be a topic for the face to face discussion and is open for more reflector discussion. HYSTERESIS AND INPUT RISE TIME SPECIFICATION (NEW DISCUSSION) Arpad Muranyi discussed IBIS USERS' GROUP reflector questions from John Fitzpatrick. One question dealt with whether IBIS supports hysteresis. Bob Ross indicated that hysteresis could be supported by putting in the smaller threshold for Vinh and the larger one for Vinl. This may work for timing limits. One question is whether the actual threshold values or the specification limits should be used. The data itself may cause a too conservative timing estimate for a hysteresis input designed to tighten up the timing tolerances. So there is expected to be more discussion on this subject at the Face to Face Meeting. Another topic concerned a Tinr and Tinf input rise and fall time specification. This would be similar to the threshold limits Vinh and Vinl that are specification limits for the [Model]. A few devices do have input rise and fall specifications. For some cases, if the input is too slow the device can be destroyed. In other cases, it may be needed to assure compliance with other timing specification. This also can be a topic for the Face to Face Meeting. DOUBLE COUNTING OF PULLUP AND PULLDOWN RESISTORS (NEW DISCUSSION) Arpad Muranyi recounted his experience and caution that one must understand the Clamping tables when modeling devices with internal pullup or pulldown resistors to avoid double counting the resistors. Bob Ross indicated that it is permissible to supply data outside of the (minimum) ranges mandated by the Specification. The minimum ranges are appropriate for most devices where the clamps will converge to nearly 0ma at the Vcc points. With an internal pullup, for example the [Power Clamp] table would be extended all the way to -Vcc to accurate model its effect. Arpad has correctly taken this into account in the models he has supplied and cautions others to be alert to double counting problems if they have internal pullup and pulldown elements. Dick Ulmer indicated that the values may be negligible (e.g., 50k) for many cases. However, there can be cases where the elements are significant. NEXT MEETING: It is set on Friday, January 12, 1996, and the Face-to-Face Meeting is on Monday, January 29, 1996. ============================================================================== NOTES IBIS CHAIR: Will Hobbs (503) 264-4369, Fax (503) 264-4210 will_hobbs@ccm.jf.intel.com Server Chipset System Validation Manager, Intel Corp. 2111 NE 28th M/S JF1-57, Hillsboro, OR 97124 USA VICE CHAIR: Jon Powell (805) 988-8250, Fax: (805) 988-8259 jonp@qdt.com 1385 Del Norte Rd., Camarillo, CA 93010 SECRETARY: Bob Ross (503) 603-2523, fax (503) 639-3469 bob@icx.com 10220 SW Nimbus Ave, K4, Portland, OR 97223 The following email addresses are used: ibis-request@vhdl.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@vhdl.org), the IBIS Users' Group Reflector (ibis-users@vhdl.org) or both. State your request. ibis-info@vhdl.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@vhdl.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. ibis-users@vhdl.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. Check the pub/ibis directory on vhdl.org for more information on previous discussions and results. You can get on via ftp anonymous, "guest" login from telnet or dial-in (415-335-0110), or send an email request to the automatic archive server, archive@vhdl.org. "IBIS Spoken Here" placards are available from Jon Powell (jonp@qdt.com) for use at trade shows. ==============================================================================