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                            QUAlity Issue Log (QUAIL)
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QUAIL ID#        1
ISSUE TITLE:     Check for Pullup/Pulldown I-V Zero-crossing for IQ2.0
REQUESTER:       Anders Ekholm, Ericsson
DATE SUBMITTED:  March 9, 2010
DATE REVISED:    
DATE ACCEPTED:   PENDING

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STATEMENT OF THE ISSUE:
Suggested changes to the IBIS IQ spec 2.0

REASON:
Reading sections 5.3.8 and 5.3.9 it clearly shows there is now definition
of the term approximately means and thereby there are no recommend way
of adapring these two checkes, every user will have to define how large
a deviation is acceptable.

EDA tools are starting to show up that implements some of the IQ
specification 2.0 checks and for sections 5.3.8 and 5.3.9 it will be up
to each individual tool vendor which limits to use to fullfill this test.

In most other checks there are clear limits specified for the check.

STATEMENT OF THE RESOLVED SPECIFICATIONS:
A change of the two sections are proposed according to the specification below.

Replace the original text:

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5.3.8.	{LEVEL 2}  [Pulldown] I-V tables pass through zero/zero
Typical, Minimum, and Maximum [Pulldown] table currents should all pass through
approximately 0 mA at the 0 volt point in the voltage column, for full swing
technologies such as CMOS. All three current columns should pass through zero
current at the zero volt line in the table, except in special cases (i.e. TTL,
PECL, LVDS, or SERDES driver).


5.3.9.	{LEVEL 2}  [Pullup] I-V tables pass through zero/zero
Typical, Minimum, and Maximum [Pullup] table currents should all pass through
approximately 0 mA at the 0 volt point in the voltage column, for full swing
technologies such as CMOS. All three current columns should pass through zero
current at the zero volt line in the table, except in special cases (i.e. TTL,
PECL, LVDS, or SERDES driver).
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with new text: (Changed lines are indicated with *)

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5.3.8.	{LEVEL 2}  [Pulldown] I-V tables pass through zero/zero
Typical, Minimum, and Maximum [Pulldown] table currents should all pass through
*0 mA at the 0 volt point in the voltage column within a margin of 10uA, for full
*swing technologies such as CMOS. All three current columns should pass through
*zero current at the zero volt line in the table, except in special cases (i.e.
*TTL, PECL, LVDS, or SERDES driver).


5.3.9.	{LEVEL 2}  [Pullup] I-V tables pass through zero/zero
Typical, Minimum, and Maximum [Pullup] table currents should all pass through
*0 mA at the 0 volt point in the voltage column within a margin of 10uA, for full
*swing technologies such as CMOS. All three current columns should pass through
*zero current at the zero volt line in the table, except in special cases (i.e.
*TTL, PECL, LVDS, or SERDES driver).
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ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:
Ibischk 5.0 was run on a test file where the crossing of 0V in pullup and
pulldown tables was moved more than 200mA from 0 mA. ibischk 5.0 complained
that the data was nonmonotonic and it did not agree with the vT waveforms.
Which was expected, but it did not complain on the non-zero A, 0V crossing.

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ANY OTHER BACKGROUND INFORMATION:


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