Potential IBIS Parser Bugs to implement IQ checks 2.2 {LEVEL 0} Latest [IBIS ver] used The highest IBIS version for which a parser is available should be used (presently 3.2, soon to be 4.0). Even if only IBIS 2.1 features are used in the model, the [IBIS Ver] value should be set to at least 3.2, this enables additional checking over and above the checks performed on version 2.1 models. [BUG]: ibischk warning if old [IBIS ver] used 2.3 {LEVEL 0} Do not use [Comment Char] If you are using the default comment character, then this keyword is not needed. Changing the comment character is not advised. [BUG]: ibischk warning if [Comment char] used 3.1.1 {LEVEL 0} [Package] must have typical values Typical values must be defined on a component. Min/Max optional but must be defined as NA if not available. [BUG]: ibischk warning if no typical values for [Package] 3.1.2 {LEVEL 0} [Package] Parasitics must be reasonable Reasonable values are: L < 10nH, C < 20pF, R < 1 ohm Min must be less than typ and typ less than max. [BUG]: ibischk warning if [Package] values are unreasonable 3.1.3 {LEVEL 0} [Define Package Model] present if [Package Model] is present The [Define Package Model] keyword must be present if [Package Model] is present, even if contained in a separate .pkg file. [DONE] IBISCHK4 V4.0.2 prints an error message 3.2.2 {LEVEL 0} [Pin] model names not too long Model names in the [Pin] section should not exceed 20 characters for IBIS version 3.x, 30 characters for 4.x [DONE] IBISCHK4 V4.0.2 prints an error message 3.2.3 {LEVEL 0} [Pin] models present in file Models referenced in the [Pin] section must exist in the same IBIS file or refer to a Model Selector. Bear in mind that model names in an IBIS file are case-sensitive. [DONE] IBISCHK4 V4.0.2 prints an error message 3.2.4 {OPTIONAL} [Pin] RLC complete RLC is optional on pins. If not defined either leave blank or use NA NA NA [BUG]: ibischk warning if [Pin] RLC values are missing 3.3.1 {LEVEL 0} [Diff Pin] referenced pins exist If [Diff Pin] is defined, referenced physical pins must exist in the [Pin] section. [DONE] IBISCHK4 V4.0.2 prints an error message 3.3.2 {LEVEL 0} [Diff Pin] Vdiff and Tskew complete and reasonable Vdiff must be defined and should be non-zero and positive. Skew data can be NA. Skew data must be reasonable if defined. Uncertainty window must be reasonable if defined. [BUG]: ibischk warning if Vdiff is undefined or zero [BUG]: ibischk warning if Tdelay is undefined or zero 4.1.1 {LEVEL 0} [Model] parameters have correct typ/min/max order Min corresponds to the conditions for weak/slow buffers, Max corresponds to conditions for strong/fast buffers. [BUG]: ibischk warning if typ/min/max C_comp out of order [BUG]: ibischk warning if typ/min/max combined I/V curves out of order 4.1.2 {LEVEL 0} [Model] Model_type The Model_type subparameter is case sensitive. The value must be one of the listed types from the IBIS specification. Examples of the commonly used model types below illustrate the required IV tables. MODEL_TYPE PULLUP PULLDOWN POWER_CLAMP GND_CLAMP COMBINED COMBINDED PULLUP+ PULLDOWN+ POWERCLAMP GND_CLAMP I/O XXX XXX XXX XXX Output XXX XXX XXX XXX 3-state XXX XXX XXX XXX I/O_Open_Drain XXX XXX XXX I/O_Open_Sink XXX XXX XXX I/O_Open_Source XXX XXX XXX Open_Drain XXX XXX XXX Open_Sink XXX XXX XXX Open_Source XXX XXX XXX [DONE] IBISCHK4 V4.0.2 prints an error message 4.1.3 {LEVEL 0} [Model] C_comp is reasonable C_comp must be defined, positive and less than 20pF. [BUG]: ibischk warning if C_comp value is unreasonble 4.2.1 {LEVEL 0} [Model] Vinl and Vinh complete All input and I/O buffers have Vinl and Vinh subparameters in the [Model] section. 4.2.2 {LEVEL 1} [Model] Vinl and Vinh correct Vinl and Vinh subparameters in the [Model] section represent the voltages at which a very slowly changing input signal is able to change the sensed input logic level for a typical corner buffer. [BUG]: ibischk warning if Vinh or Vinl is missing 4.2.3 {LEVEL 1} [Model] Vinl and Vinh enclose Vmeas For I/O buffers Vinl and Vinh values should be below and above, respectively, Vmeas. Exceptions to this should be explained in a comment. It's uncommon. [BUG]: ibischk warning if Vmeas not between Vinh or Vinl in I/O models 4.2.7 {LEVEL 0} [Model Spec] Vinl+/Vinh+ greater than Vinl-/Vinh- Vinh+ is greater than Vinh-, and Vinl+ is greater than Vinl-. [BUG]: ibischk warning if Vinh+ < Vinh- or Vinl+ > Vinl- NOTE: ibischk does compare these to Vinh and Vinl: WARNING - Vinh+(Typ) is not greater than or equal to Vinh-(Typ) for Model Spec defined on line 986 4.2.8 {LEVEL 1} [Model Spec] Vinl+/- and Vinh+/- enclose Vmeas For I/O buffers Vinl+ and Vinh- values should be below and above, respectively, Vmeas. Exceptions to this should be explained in a comment. [BUG]: ibischk warning if Vinh- < Vmeas or Vinl+ > Vmeas 4.2.10 {LEVEL 1} [Model Spec] Pulse_high greater than Vinh Pulse_high is greater than Vinh. [DONE] IBISCHK4 V4.0.2 prints an error message 4.2.11 {LEVEL 1} [Model Spec] Pulse_low less than Vinl Pulse_low is less than Vinl. [DONE] IBISCHK4 V4.0.2 prints an error message 4.2.12 {LEVEL 1} [Model Spec] Pulse_time reasonable Pulse_time is less than the minimum rise time and fall time normally expected at the input. [BUG]: ibischk warning if Pulse_time is unreasonable 4.2.13 {LEVEL 1} [Model Spec] S_Overshoot subparameters complete All input and I/O buffers have S_overshoot_high and S_overshoot_low in the [Model Spec] section. [BUG]: ibischk warning if S_overshoot_high or S_overshoot_low missing 4.2.17 {LEVEL 1} [Model Spec] D_Overshoot subparams exceed S_Overshoot D_overshoot_high must be greater than S_overshoot_high, and D_overshoot_low must be less than S_overshoot_low. [DONE] IBISCHK4 V4.0.2 prints an error message NOTE: title is wrong? 4.3.2 {LEVEL 1} I-V tables have correct typ/min/max order Inspect every I-V table. Check for proper order of the I-V tables. Columns Values in table must be: VOLTAGE, Current Typ, Current Min, Current Max In most cases current of Max is greater then current of typical, which is greater than Min, in the active region (e.g. where device is not clamping). This check is easily accomplished by viewing the curves and checking visually. [BUG]: ibischk warning if I/V curve typ/min/max order incorrect 4.3.3 {LEVEL 1} I-V tables have reasonable numerical range Check the numerical range of I-V values. Voltage Units are implied Volts. Current units are implied Amps. Recommendation on how to handle excessive currents. Currents in excess of 1 amp should be truncated. At least one additional point should be included that prevents the slope from being 0. [BUG]: ibischk warning if I/V curve currents are excessive 4.3.4 {LEVEL 1} [Pullup] voltage sweep range is correct The sweep for [Pullup] should be made between -vcc to 2*vcc. Pullup tables are relative to Pullup reference. The Pullup table combined with the power and ground clamp tables should be monotonic. Non-monotonic combined I-V tables must be documented. [BUG]: ibischk warning if [Pullup] voltage range incorrect 4.3.5 {LEVEL 1} [Pulldown] voltage sweep range is correct The sweep for [Pulldown] should be made between -vcc to 2*vcc. The Pulldown table combined with the power and ground clamp should be monotonic. Non-monotonic combined I-V tables must be documented. [BUG]: ibischk warning if [Pulldown] voltage range incorrect 4.3.6 {LEVEL 1} [Power Clamp] voltage sweep range is correct The [Power Clamp] should turn on near supply voltage i.e. (i.e. 3.3 volts for typ cmos power clamp). The sweep for Power clamp should be at least made between +vcc and +2vcc (it is permitted to extend the range). Non-monotonic I-V tables must be documented. [BUG]: ibischk warning if [Power Clamp] voltage range incorrect 4.3.7 {LEVEL 1} [GND Clamp] voltage sweep range is correct [GND Clamp] should turn on approximately one Diode drop below 0.0 (i.e. 0.7 volts). The sweep for [GND Clamp] should be made at least between -vccmax and +vccmax (it is permitted to extend the range). Non-monotonic I-V tables must be documented. NOTE: Simulation Tools will extrapolate Power and ground clamps that do not meet at a break point. It is permitted to extend sweep range to avoid extrapolation problems. [BUG]: ibischk warning if [Ground Clamp] voltage range incorrect 4.3.8 {LEVEL 1} I-V tables do not exhibit stair-stepping There should be no Stair Stepping of any I-V tables. This is caused by insufficient significant digits in the table current columns. It is also a common problem from the NCSU s2ibis conversion process. This check is easily accomplished by viewing the curves and checking visually. [BUG]: ibischk warning if I/V curves exhibit stair-stepping 4.3.9 {LEVEL 1} Combined I-V tables are monotonic Check that the combined tables are monotonically increasing, ie. there are no slope reversals in the current values. This check is easily accomplished by viewing the curves and checking visually. This must be checked by visual inspection until a Parser Bug is fixed in IBISCHK 4.x. This is important if there are non monotonic warnings because the Golden IBIS parser does NOT check combined tables. The Golden IBIS parser also stops reporting errors on a table after the first non-monotonic points are found. [DONE] IBISCHK4 V4.0.2 prints an error message 4.3.10 {LEVEL 1} [Pulldown] I-V tables pass through zero/zero Typ, Min, and Max Pulldown table currents should all pass through zero at zero volts from ground (cmos). These three pull down tables should pass through zero/zero except in special cases (i.e. Differential, PECL, LVDS, or SERDES driver). [BUG]: ibischk warning if [Pulldown] curve does not cross zero-zero 4.3.11 {LEVEL 1} [Pullup] I-V tables pass through zero/zero For Un-terminated Models (i.e. CMOS push-pull), Typ, Min, and Max Pullup table currents should pass through zero current at zero volts for Vcc relative tables. If these curves are viewed graphically, ground relative, they should pass through their respective supply rail (eg. Typ should pass through 3.3 volts, Max should pass through 3.6 volts, min should pass through 3.0). Note that an IBIS I-V table is offset such that supply voltage on the Typ table falls at 0 volts in the table. For example, 3.3 volts usually falls at 0.0 in the table. Terminated drivers and some technologies may be exceptions i.e. Bipolar, ECL, and CMOS LVDS. [BUG]: ibischk warning if [Pullup] curve does not cross zero-zero 4.3.12 {LEVEL 1} No leakage current in clamp I-V tables Review each clamp table. The expected currents should be less than 1 uA in the normal operating ranges (typically from 0 to 2 Vcc range in the table). If a table is truncated, use the extrapolated values based on the last two points prior to extrapolation. Or use a viewer which can combine the two clamp tables into one. Exceptions can exist for older TTL technologies where several milliamps may be observed and for some ECL and other technologies with which can have internal termination networks. Exceptions should be understood and documented. [BUG]: ibischk warning if leakage currents in I/V curves 4.3.15 {LEVEL 1} ECL models I-V tables swept from -Vdd to +2 Vdd. I-V tables in ECL models should be swept from -Vdd to +2 Vdd, even though the operating range is narrower. [BUG]: ibischk warning if ECL model I/V curves voltage range incorrect NOTE: isn't this covered by 4.3.4 - 4.3.7 ? 4.3.16 {LEVEL 1} Point distributions in IV curves should be sufficient We recommend a minimum of 10 data points at points of inflection to prevent interpolation issues in simulations. [BUG]: ibischk warning if insufficient I/V points near inflections 4.4.2 {LEVEL 0} V-T table endpoints consistent with I-V tables The voltage associated with the intersection of the V_fixture, R_fixture, and R_dut (if present) load line with the respective combined high/low DC I-V characteristic should be within 2% of the V-T table DC endpoints based on the V-T table DC range. The combined High State DC I-V characteristic is defined as the sum of the [Power Clamp], [GND Clamp], and [Pullup] I-V tables (ground relative). Similarly, the combined Low State DC I-V characteristic is defined as the sum of the [Power Clamp], [GND clamp], and [Pulldown] I-V tables (ground relative). [DONE] IBISCHK4 V4.0.2 prints an error message 4.4.3 {LEVEL 1} V-T tables look reasonable V-T tables should be well behaved, with continuous second derivative. V-T point density should be greater in areas with non-zero second derivative. Excess V-T points in beginning and end of V-T tables should be removed. Relative time position between all tables should be maintained. Final DC value must be achieved, ie. the ending slope should be very small. This check is easily accomplished by viewing the curves and checking visually. [BUG]: ibischk warning if 2nd derivative of V/T curve is discontinuous [BUG]: ibischk warning if insufficient V/T points near inflection [BUG]: ibischk warning if V/T curve end slope is excessive 4.4.6 {LEVEL 1} Output and IO buffers have should have 2 sets of V-T tables Outputs and IO buffers should have four V-T tables: 50 Ohm Pullup (Voltage = [Pull Reference]) Rising Falling 50 Ohm Pulldown (Voltage = [Pull Reference]) Rising Falling LVDS and other terminated technologies may be modeled using 2 sets of V-T tables. by including Common mode voltage close to the region of operation. for example 50 Ohm to Vcm (Common Mode Voltage) Rising Falling [BUG]: ibischk warning if less than 2 sets of V/T curves 4.5.1 {LEVEL 0} Output and IO buffers have a [Ramp] section All buffers capable of output have a [Ramp] section. Input-only buffers, terminators, Series and Series_switch models do not have a [Ramp] section. [DONE] IBISCHK4 V4.0.2 prints an error message 4.5.3 {LEVEL 1} [Ramp] test fixture has no reactives The fixture used for generating [Ramp] measurement waveforms has only the buffer, a load resistor, and a terminating voltage. No capacitors or inductors, for example. [BUG]: ibischk warning if Ramp test fixture has reactive elements 4.5.5 {LEVEL 1} [Ramp] data dv and dt values positive The dV and dt values are greater than zero. Note that s2ibis2 will incorrectly generate negative [Ramp] values in the case where the [Ramp] simulation duration is much longer than the [Ramp] dt, leaving no waveform points that fall between the 20% and 80% voltage levels. The default test fixture for determining [Ramp] data has a 50 ohm resistor, tied to power for falling data and tied to ground for rising data. The initial and final values of the waveforms are used to define 20% and 80% voltage points, where [Ramp] measurements are made. These test fixtures may be similar to test fixtures used to produce [Rising Waveform] and [Falling Waveform] data, in which case the data can be checked for consistency. For example, a Rising Waveform with R_fixture = 50 and V_fixture = 0.0 should have a 20% to 80% dt that is similar to the [Ramp] dt_r value. [DONE] IBISCHK4 V4.0.2 prints an error message 4.5.6 {LEVEL 1} [Ramp] dV consistent with supply voltages The [Ramp] dV values must not exceed 60% (80% - 20%) of: [Pullup Reference] - [Pulldown Reference] or [Voltage Range] [BUG]: ibischk warning if Ramp dV inconsistent with supply voltages 4.5.7 {LEVEL 1} [Ramp] dV consistent with V-T table endpoints Each [Ramp] dV value must match within a factor of two 60% (80% - 20%) of the difference between the initial and final voltages of the corresponding V-T table with test fixture matching the Ramp test fixture, if matching V-T tables are present. The [Ramp] dV values must not be less than half, nor greater than double, the calculated 60% of beginning-to-end voltage differences in the corresponding V-T tables. For Output, I/O, or 3-state models the V-T table that must be consistent with the dV values of [Ramp] dV/dt_r will be a [Rising Waveform] with R_fixture equal to the [Ramp] R_load subparameter (or 50 ohms if R_load is absent) and V_fixture equal to [Pulldown Reference] or 0V. The V-T table that must be consistent with the dV values of [Ramp] dV/dt_f will be a [Falling Waveform] with the same R_fixture, and V_fixture equal to [Pullup Reference] or [Voltage Range]. For Output_ECL, I/O_ECL, 3-state_ECL models the V-T table that must be consistent with the dV values of [Ramp] dV/dt_r will be a [Rising Waveform] with R_fixture equal to the [Ramp] R_load subparameter (or 50 ohms if R_load is absent) and V_fixture equal to ([Pullup Reference] or [Voltage Range]) minus 2V. The V-T table that must be consistent with the dV values of [Ramp] dV/dt_f will be a [Falling Waveform] with the same R_fixture and V_fixture. For Open_sink and Open_drain models the V-T table that must be consistent with the dV values of [Ramp] dV/dt_r will be a [Rising Waveform] with R_fixture equal to the [Ramp] R_load subparameter (or 50 ohms if R_load is absent) and V_fixture equal to [Pullup Reference] or [Voltage Range]. The V-T table that must be consistent with the dV values of [Ramp] dV/dt_f will be a [Falling Waveform] with the same R_fixture and V_fixture. For Open_source models the V-T table that must be consistent with the dV values of [Ramp] dV/dt_r will be a [Rising Waveform] with R_fixture equal to the [Ramp] R_load subparameter (or 50 ohms if R_load is absent) and V_fixture equal to [Pulldown Reference] or 0V. The V-T table that must be consistent with the dV values of [Ramp] dV/dt_f will be a [Falling Waveform] with the same R_fixture and V_fixture. When comparing V_Fixture against [Pullup Reference] or [Voltage Range] it is expected that the typ, min, and max values of [Voltage Range] will correspond to the V_fixture, V_fixture_min, and V_fixture_max values, respectively. This check is not to be performed using V-T tables with V_fixture or R_fixture not matching [Ramp] fixture values. Reasonably small values of C_fixture, L_fixture, R_dut, L_dut, and C_dut parameters in [Rising Waveform] and [Falling Wavform] can be overlooked in the V-T table selection process, although these may degrade the correlation of [Ramp] to V-T table endpoints. [BUG]: ibischk warning if Ramp dV inconsistent with V/T endpoints 4.5.8 {LEVEL 1} [Ramp] dt is consistent with 20%-80% crossing time Each dt value matches within a factor of two the difference between the times of crossing the 20% voltage point and the 80% voltage point on the corresponding [Rising Waveform] or [Falling Waveform] with test fixture most similar to the Ramp test fixture. [BUG]: ibischk warning if Ramp dt inconsistent with V/T crossing time 5.11 {LEVEL 1} Open_sink/Open_source model not push-pull An open sink model must be modeled with a resistive load to vcc/vtt for both rising and falling. It is assumed for ramp that the 50 ohms is present and for both edges it goes to VCC. Be sure fixture voltage goes to reasonable voltage. Failure to do so will result in no rising wavforms, and unswitching waveforms. [BUG]: ibischk warning if V/T curves flat NOTE: does the ibischk endpoint check catch this?