CONTENT OF THE EUROPEAN IBIS OPEN FORUM SUMMIT MEETING
April 19, 2007
Nice, France

   .zip  Compressed
   .ppt, .pps  Power Point
   .doc  Word
   .ps   Postscript
   .pdf  Acrobat
   .txt  Text

ADMINISTRATIVE DOCUMENTS:

00readme.txt    This Document
a041907.txt     Agenda
m041907.pdf     Minutes

PRESENTATIONS AND ACTUAL TITLES (IN ACTUAL ORDER OF PRESENTATION):

sicard.zip      From IBIS to Electromagnetic Compatibility Prediction of
sicard.pdf      Integrated Circuits (.ppt)
                Etienne Sicard,  National Institute of Applied Science
                (INSA),France
 
stievano.pdf    IdEM and Mpilog: Macromodeling Tools for System-Level
                Signal Integrity and EMC Assessment
                Flavio Canavero, Michelangelo Bandinu, Stefano Grivet-Talocia,
                Ivan Maio, and Igor Stievano, Politecnico di Torino, Italy
                (Presented by Igor Stievano)

rongere.zip     Forward Looking Trends in SERDES Modeling (.ppt)
rongere.pdf     Eric Rongere and Stephane Rousseau, Mentor Graphics
                Corporation, France
                (Presented by Eric Rongere)

girardi.zip     Gate Modulation Solution Validated by VHDL-AMS 
girardi.pdf     Implementation (.ppt)
                Antonio Girardi, Giacomo Bernardi, and Roberto Izzi,
                STMicroelectronics, Italy
                (Presented by Antonio Girardi)

lenski.zip      Experiences with Driver Schedules (.ppt)
lenski.pdf      Eckhard Lenski, Nokia Siemens Networks GmbH, Germany


dieye.pdf       Mixed Signal Channel Modelling Approach for Signal
                Integrity Analysis
                Saliou Dieye and Riccardo Giacometti, Agilent Technologies,
                France
                (Presented by Saliou Dieye)

maurer.pdf      IBIS Models with Reactive Loads
                Manfred Maurer, Siemens AG, Germany