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                   AGENDA - IBIS SUMMIT MEETING
                   Thursday, February 7, 2008

                  Santa Clara Convention Center
                     Santa Clara, California

     Room: Great American Ballroom (1 and 2) in the Convention
           Center, Second Floor (look for signs)

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8:00 AM     Refreshments & Sign In

8:30 AM     Official Opening
            - Welcome to Summit
            - Introductions
            - Opens for Issues & Discussion Topics

8:45 AM     IBIS Chair's Report
            Michael Mirmak, Intel Corporation

9:00 AM     Waveform Comparison and S2IBIS3 Roadmap
            Lance Wang, IO Methodology

9:30 AM     Modeling DDR3 with IBIS
            Randy Wolff, Micron Technology

10:00 AM    BREAK

10:15 AM    Proper IBIS Package Modeling Techniques and Usage in
            Ideal-PDS and SSO Simulations
            Sam Chitwood, Sigrity

10:45 AM    Touchstone Syntax for Versions 1.0 and 2.0
            Bob Ross, Teraspeed Consulting Group

11:15 AM    New Interconnect Models Remove Simulation Uncertainty
            Fangyi Rao*, Chad Morgan**, Vuk Borich* and
            Sanjeev Gupta*, *Agilent Technologies and **Tyco
            Electronics

12:00 PM    LUNCH - (Hosted by Cisco Systems)
            Pre-registration required

1:00 PM     Multi-Mode Modeling
            Bob Ross, Teraspeed Consulting Group

1:30 PM     Building Advanced Transmission Line and Via-hole Models
            for Serial Channels with 10 Gbps and Higher Data Rates
            Yuriy Shlepnev, Simberian

2:00 PM     Advances in 7.5Gb/s SerDes Modeling using 
            IBISv4.2(VHDL-AMS and Verilog-AMS)
            Luis Boluna*, Kelvin Qiu*, Ehsan Kabir*, Susmita Mutsuddy*,
            Daniel Ho*, and Dr. Sang Baeg**, *Cisco Systems and
            **University of Hanyang (South Korea)

2:45 PM     BREAK

3:00 PM     IBIS-AMI Algorithmic Modeling with Different Languages
            Arpad Muranyi, Mentor Graphics Corporation

3:30 PM     Serdes Modeling: Demonstrating IBIS-AMI Model
            Interoperability
            Todd Westerhoff, Signal Integrity Software (SiSoft)

4:00 PM     Experiences in Developing and Correlating Eight
            Interoperable Algorithmic Models
            Adge Hawes* and Ken Willis**, *IBM and *Cadence Design
            Systems

4:30 PM     Open Discussion

4:45 PM     Concluding Items
            - Next Open Forum Meeting: February 22, 2008
            - DATE 2008: March 14, 2008, Munich, Germany

5:00 PM     End of Meeting Room Availability

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Sponsors:   Cisco Systems, DesignCon, IBIS Open Forum

DesignCon:  February 4 - 7, 2008
            Santa Clara Convention Center
            Santa Clara, California
            See http://www.designcon.com/ for more information.

LIST OF NEARBY HOTELS

  See http://www.designcon.com/conference/hotel_8_travel.html for
  travel directions, hotels and other information.