CONTENTS OF THE EIA IBIS OPEN FORUM SUMMIT MEETING
January 27, 2003
Santa Clara, California

   .zip  Compressed
   .ppt  Power Point
   .doc  Word
   .ps   Postscript
   .pdf  Acrobat
   .txt  Text

ADMINISTRATIVE DOCUMENTS:

00readme.txt     This Document
a012703.txt      Agenda
m012703.txt      Minutes

PRESENTATIONS AND ACTUAL TITLES (IN ACTUAL ORDER OF PRESENTATION):

peters.zip       IBIS Chair's Report (.ppt)
peters.pdf       Stephen Peters (Intel)

ross.zip         Reflections on IBIS (.ppt)
ross.pdf         Bob Ross (Mentor Graphics)

smolyansky.zip   Lossy Line Simulation and Analysis (.ppt with Notes)
smolyansky.pdf   Dima Smolyansky (Time Domain Analysis Systems)

katz.zip         IBIS Quality Committee Update / Practical Use of IQ
katz.pdf         Checklist (.ppt with Notes)
                 Barry Katz and Robert Haller (Signal Integrity Software)

coyle.zip        IBIS Modeling Experiences (.ppt with Notes)
coyle.pdf        Tim Coyle (National Semiconductor)

muranyi.pdf      Data Dependent Buffer Characteristics
                 Arpad Muranyi (Intel)

ito.zip          The Case Study of Board Simulation (.ppt with Notes)
ito.pdf          Atsuji Ito (Matsushita Electric Industrial Co. (Panasonic)
                 and JEITA EDA WG Chair)

green_k.zip      IBIS Interconnect Specification (ICM) Status and
green_k.pdf      Proposed Changes (.ppt)
                 Kelly Green (Consultant) and Michael Mirmak (Intel)
mirmak.txt       (Untitled Clarification and Editorial Change Document)
                 Kelly Green (Consultant) and Michael Mirmak (Intel)
                 (Presented by Michael Mirmak and Kelly Green)

green_l.zip      A BIRD 75 Multi-lingual Example (.ppt)
green_l.pdf      Lynne Green (Cadence Design Systems)