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                   AGENDA, IBIS SUMMIT MEETING
                          June 8, 2000
                         Manhattan Room
                       Hyatt Regency Hotel
                     Los Angeles, California
  
8:30 AM   REFRESHMENTS AND SIGN-IN

9:00 AM   INTRODUCTIONS

9:10 AM   IBIS REPORT
          Bob Ross, Mentor Graphics

9:30 AM   INTRODUCTION TO EQUATION BASED ANALOG MODELING IN STANDARD
          HDL LANGUAGES (VHDL_AMS AND VERILOG)
          Kenneth Bakalar, Mentor Graphics

10:00 AM  ELECTION OF OFFICERS AND OTHER BUSINESS

10:30 AM  BREAK

10:45 AM  CONNECTOR MODEL SPECIFICATION & DISCUSSION
          Kellee Crisafulli, HyperLynx

12:00 PM  LUNCH (Provided to Attendees)

1:00 PM   IBIS FUTURE DIRECTIONS UPDATE
          Stephen Peters, Intel 

1:30 PM   OVERVIEW OF XML
          Mike LaBonte, Cadence Design

2:00 PM   MACRO LANGUAGE
          Al Davis, HyperLynx

2:30 PM   BREAK

2:45 PM   OPEN DISCUSSION AND AD HOC PRESENTATIONS
          - Version 4.0 Issues
          - IBIS Futures Issues
          - Next Meetings
          - Etc.

5:00 PM   MEETING ENDS
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