| This file contains a description of Ibis 3.2 in the proposed language. | It serves as proof that the new language is backward compatible, | and provides a base from which extensions can be added. | It would be provided with any implementation. | |--------------------------------------------------------------------- [Define Model] Series (pin1 pin2) .local t1, t2, t3 Rseries (pin1 pin2) R = R_Series || open Lseries (pin1 t1) L = L_Series || open RLseries (t1 pin2) R = Rl_Series || short Cseries (pin1 t2) C = C_Series || open LCseries (t2 t3) L = Lc_Series || short RCseries (t3 pin2) R = Rc_Series || short Rsercur (pin1 pin2) I = Series_Current[V] || open .vcg Mosfet (pin1 pin2 0 pin2) I = Series_MOSFET[Vc,Vo=Vds] || open .correlate fast/slow=min/max L*, C* .correlate strong/weak=min/max R* .correlate strong/weak=max/min S* [End Define Model] |--------------------------------------------------------------------- [Define Model] Series_switch (pin1 pin2 control) .select (Logic(control)) .case 0=Off .inherit Series .case 1=On .inherit Series .end select [End Define Model] |--------------------------------------------------------------------- [Define Base] model_base (pin gnd control en pullup_ref pulldown_ref power_clamp_ref gnd_clamp_ref) .define VT = .86e-4 * [Temperature_Range] || .026 .if (!power_clamp_ref) .local power_clamp_ref Vpcr (power_clamp_ref gnd) V = POWER_Clamp_Reference || Voltage_Range .endif .if (!gnd_clamp_ref) .local gnd_clamp_ref Vgcr (gnd_clamp_ref gnd) V = GND_Clamp_Reference || short .endif Rpc (pin power_clamp_ref) I = POWER_Clamp[-V] Rgc (pin gnd_clamp_ref) I = GND_Clamp[V] Cttpwr (pin power_clamp_ref) C = TTpower * POWER_Clamp[-V] / VT || open Cttgnd (pin gnd_clamp_ref) C = TTgnd * GND_Clamp[V] / VT || open Ccomp (pin gnd) C = C_comp .array Add_Submodel .if ($1 == Non_Driving) .local sm_enable .inverter U1 (sm_enable gnd en) .else if ($1 == All) .local sm_enable .dsource U2 (sm_enable gnd) 1 .else .assert ($1 == Driving) .define sm_enable en .endif X$0 (en=sm_enable ...) $0 .endarray .correlate fast/slow=min/max C*, L*, TT* .correlate strong/weak=min/max R*, *Clamp, Voltage_Range .correlate strong/weak=max/min *Reference [End Define Base] |--------------------------------------------------------------------- [Define Model] Terminator .inherit model_base .local t1 Rac (pin t1) R = Rac || short Cac (t1 gnd) C = Cac || open Rpwr (pin power_clamp_ref) R = Rpower || open Rgnd (pin gnd_clamp_ref) R = Rgnd || open [End Define Model] |--------------------------------------------------------------------- [Define Model] Input .inherit model_base .if (Polarity == Inverting) .trigger switch_hi (V(pin) < [Model_Spec]Pulse_low || V(pin) < ([Model_Spec]Vmeas || Vmeas) for [Model_Spec]Pulse_time || 0) .trigger switch_lo (V(pin) > [Model_Spec]Pulse_high || V(pin) > ([Model_Spec]Vmeas || Vmeas) for [Model_Spec]Pulse_time || 0) .else .assert (Polarity == Non-Inverting || !Polarity) .trigger switch_hi (V(pin) > [Model_Spec]Pulse_high || V(pin) > ([Model_Spec]Vmeas || Vmeas) for [Model_Spec]Pulse_time || 0) .trigger switch_lo (V(pin) < [Model_Spec]Pulse_low || V(pin) < ([Model_Spec]Vmeas || Vmeas) for [Model_Spec]Pulse_time || 0) .endif .alarm failure (V(pin) > D_overshoot_high || V(pin) < D_overshoot_low || V(pin) > S_overshoot_high for D_overshoot_time || V(pin) < S_overshoot_low for D_overshoot_time || never) .export switch_hi, switch_lo, failure |*** Keywords not covered: Vinl, Vinh, Vinh+, Vinh-, Vinl+, Vinl- |*** Reason: too much typing. Just more triggers and exports. [End Define Model] |--------------------------------------------------------------------- [Define Model] 3-state .inherit model_base .if (Enable == Active-Low) .reverse en .else .assert (Enable == Active-High || !Enable) .endif .if (!pullup_ref) .local pullup_ref Vpur (pullup_ref gnd) V = Pullup_Reference || Voltage_Range .endif .if (!pulldown_ref) .local pulldown_ref Vpdr (pulldown_ref gnd) V = Pulldown_Reference || short .endif .if (Driver_Schedule) .array Driver_Schedule .local retrigger .reshape U$0 (retrigger gnd control) $1 $2 $3 $4 X$0 (control=retrigger ...) $0 .endarray .else .driver Udrv (pin gnd pullup_ref pulldown_ref tr tf en) ( S1 = Pullup[-V], S0 = Pulldown[V], T10 = Falling_Waveform[T-TF,*] || [Ramp]dv/dt_f, T01 = Rising_Waveform[T-TR,*] || [Ramp]dv/dt_r, V1 = Pullup_Reference || Voltage_Range, V0 = Pulldown_Reference || 0 ) .trigger TR (Logic(control) == 1) .trigger TF (Logic(control) == 0) .endif .correlate strong/weak=max/min Pull* .correlate fast/slow=max/min *Waveform, [Ramp]* [End Define Model] |--------------------------------------------------------------------- [Define Model] Output .inherit 3-state .assert (!en) .assert (!Enable) .define en pullup_ref [End Define Model] |--------------------------------------------------------------------- [Define Model] Open_drain .inherit Output .define Pullup[*] = 0 [End Define Model] |--------------------------------------------------------------------- [Define Model] Open_sink .inherit Open_drain [End Define Model] |--------------------------------------------------------------------- [Define Model] Open_source .inherit Output .define Pulldown[*] = 0 [End Define Model] |--------------------------------------------------------------------- [Define Model] I/O .inherit 3-state .inherit input [End Define Model] |--------------------------------------------------------------------- [Define Model] I/O_open_drain .inherit I/O .define Pullup[*] = 0 [End Define Model] |--------------------------------------------------------------------- [Define Model] I/O_open_sink .inherit I/O_open_drain [End Define Model] |--------------------------------------------------------------------- [Define Model] Input_ECL .inherit Input [End Define Model] |--------------------------------------------------------------------- [Define Model] Output_ECL .inherit Output .define Pulldown[V] = Pulldown[-V] [End Define Model] |--------------------------------------------------------------------- [Define Model] 3-state_ECL .inherit 3-state .define Pulldown[V] = Pulldown[-V] [End Define Model] |--------------------------------------------------------------------- [Define Model] I/O_ECL .inherit I/O .define Pulldown[V] = Pulldown[-V] [End Define Model] |--------------------------------------------------------------------- [Define Submodel] Dynamic_clamp .local t1 t2 Rpc (pin t1) I = POWER_Clamp[-V] Rgc (pin t2) I = GND_Clamp[V] Vpc (power_clamp_ref t1) V = POWER_Pulse_Table[T-TR] || short Vgc (gnd_clamp_ref t2) V = GND_Pulse_Table[T-TF] || short .trigger TR (V(pin) > [Submodel_Spec]V_Trigger_r) .trigger TF (V(pin) < [Submodel_Spec]V_Trigger_f) [End Define Submodel] |--------------------------------------------------------------------- [Define Submodel] Bus_hold .driver Udrv (pin gnd pullup_ref pulldown_ref tr tf en) ( S1 = Pullup[-V], S0 = Pulldown[V], T10 = Falling_Waveform[T-TF,*] || [Ramp]dv/dt_f, T01 = Rising_Waveform[T-TR,*] || [Ramp]dv/dt_r, V1 = Pullup_Reference || Voltage_Range, V0 = Pulldown_Reference || 0 ) .trigger TRraw (V(pin) > [Submodel_Spec]V_Trigger_r) .trigger TFraw (V(pin) < [Submodel_Spec]V_Trigger_f) .trigger TR (TRraw || TFraw + [Submodel_Spec]Off_delay) .trigger Tf (TFraw || TRraw + [Submodel_Spec]Off_delay) [End Define Model] |--------------------------------------------------------------------- |---------------------------------------------------------------------