CONTENTS OF THE DESIGNCON EAST IBIS SUMMIT MEETING June 23, 2003 Marlborough, Massachusetts .zip Compressed .ppt Power Point .doc Word .ps Postscript .pdf Acrobat .txt Text ADMINISTRATIVE DOCUMENTS: 00readme.txt This Document a062303.txt Agenda a062303.doc Agenda for Meeting m062303.txt Minutes PRESENTATIONS AND ACTUAL TITLES (IN ACTUAL ORDER OF PRESENTATION): mirmak1.zip State of IBIS Report (.ppt) mirmak1.pdf Michael Mirmak, Intel Corp. helliwell.zip IBIS Quality Committee Update (with Notes) (.ppt) helliwell.pdf Kim Helliwell, Apple Computer and Barry Katz, Signal Integrity Software (SiSoft) (Presented by Barry Katz, SiSoft) mirmak2.zip IBIS Interconnect Modeling Specification (ICM) Status (.ppt) mirmak2.pdf Michael Mirmak, Intel Corp. muranyi1.pdf A VHDL-AMS Buffer Model Using IBIS v3.2 Data Arpad Muranyi, Intel Corporation and Luca Giacotto Universite Joseph Fourier (Presented by Arpad Muranyi, Intel Corporation) Samples with Presentation: IBIS_basic_IO.vhd (Updated April 5, 2005, original version in old/ directory) IBIS_multiVt_IO.vhd haller.zip IBIS Models at 1.25 GHz and Beyond (.ppt) haller.pdf Bob Haller, Barry Katz, Kevin Fisher, Signal Integrity Software (SiSoft) (Presented by Bob Haller, SiSoft) green.zip IBIS 4.1 Status and Update (.ppt) green.pdf Lynne Green, Cadence Design Systems ross1.zip IBIS Algorithms Revisited (.ppt) ross1.pdf Bob Ross, Teraspeed Consulting Group muranyi2.pdf An Algorithm to Model Over-clocking More Accurately Arpad Muranyi, Intel Corporation muranyi3.pdf Modeling On-die Terminatons in IBIS (Without Double Counting) Arpad Muranyi, Intel Corporation ross2.zip On-Die Termination Comments (.ppt) ross2.pdf Bob Ross, Teraspeed Consulting Group