DATE: 3/15/02 SUBJECT: March 8, 2002 European IBIS Summit Meeting Minutes VOTING MEMBERS AND 2002 PARTICIPANTS LIST: 3Com (& CommWorks) Roy Leventhal, James Goshorn Ansoft Corporation (Eric Bracken) Apple Computer Kim Helliwell Applied Simulation Technology Fred Balistreri, Norio Matsui Avanti (Hailong Wang) Cadence Design Lynne Green, Patrick dos Santos* Cisco Systems Syed Huq, Abdulrahmun Rafiq, Zhiping Yang Cypress Semiconductor (Rajesh Manapat) EMC Corporation (Brian Arsenault) Fairchild Semiconductor Adam Tambone Huawei Technologies (Rachild Chen) IBM Greg Edlund, Pravin Patel Innoveda John Angulo, Guy de Burgh, Steve Gascoigne* Intel Corporation Stephen Peters*, Arpad Muranyi*, Will Hobbs, Pete Block, Ben Silva LSI Logic [Larry Barnes], Frank Gasparik Mentor Graphics Bob Ross, Ian Dodd, Mike Donnelly, Matt Hogan Sherif Hammad, Tom Dagostino*, Eric Rongere*, Karine Loudet* Micron Technology Randy Wolff Mitsubishi (Tom Cao) Molex Incorporated Gus Panella Motorola Rick Kingen National Semiconductor Milt Schwartz NEC Corporation (Akimoto Tetsuya) North East Systems Associates (Edward Sayre) Philips Semiconductor (D.C. Sessions) Quantic EMC (Mike Ventham) Siemens (& Automotive) AG Helmut Katzier, Katja Koller* Signal Integrity Software Barry Katz, Walter Katz, Robert Moles, Daniel Nilsson, Kevin Fisher, Steve Coe, Wiley Gillmor, Douglas Burns, Eric Brock, Sigrity Raj Raghuram SiQual Scott McMorrow, Dave Macemon, Rob Hinz Texas Instruments Thomas Fisher, Jean-Claude Perrin* Time Domain Analysis Systems Steve Corey, Dima Smolyansky Tyco Electronics (Tim Minnick) Via Technologies (Weber Chuang) Zuken (& Incases) (Michael Schraeder), Caroline Legendre* OTHER PARTICIPANTS IN 2002: Actel Prabhu Mohan Agilent Herbert Lage* Airbus Claude Huet* Alstom Transport Luca Giacotto* Apt Software Atul Agarwal Astrium Olivier Prieur* Brocade Communications Robert Badal Compaq Shafier-ur-Rahman EADS CCR Alix de la Villeguerin* EFM Ekkehard Miersch* EIA Cecilia Fleming Force Computers Roger Sukiennik* Harman/Becker Automotive Hartmut Exler* Systems Matsushita (Panasonic) Atsuji Ito National Institute of Applied Sebastian Calvet (& Motorola), Etienne Sicard* Science (INSA) Stephane Baffreau* Northrup (Litton) Robert Bremer Shindengen Elecric Mfg. Co. Tsuyoshi Horigome Sagam SA Quang Ngo*, Matthieu Fontaines* Sintecs Hans Klos* STMicroelectronics Fabrice Boissieres* Sun Microsystems Adrian Udenze* TDK Yoshikazu Fujishiro Thales Saverio Lerose* Xilinx Susan Wu, J.L. de Long Independent Larry Barnes In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Bridge Number Reservation # Passcode March 29, 2002 1-877-299-1938 N/A 8472324 (International Dial-In: 1-617-801-9666) All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out 7 days before each Open Forum, and meeting minutes out within 7 days after. When you call into the meeting, ask for the IBIS Open Forum hosted by Stephen Peters and give the reservation number and passcode. NOTE: "AR" = Action Required. -------------------------------- MINUTES ----------------------------------- INTRODUCTIONS The European IBIS Summit Meeting was held in Paris, France the day after the Design Automation and Testing in Europe conference (DATE 2002) at the Concorde La Fayette Hotel. EADS, Innoveda and Mentor Graphics served as co-sponsors. About 26 people representing 21 organizations participated. Stephen Peters welcomed the participants and thanked EADS, Innoveda and Mentor Graphics for their support in co-sponsoring the summit. Stephen also thanked Karine Loudet of Mentor Graphics for producing the posters and handling the administrative and registration details. Stephen noted that questions and interactive discussion was encouraged. Everybody introduced themselves. Semiconductor vendors, EDA vendors and users (along with an individual from a research institute) were all represented. Stephen noted that all of the presentations and meeting documentation will be uploaded at http://www.eda.org/pub/ibis/summits/mar02/ The notes below give some of the content and discussion. IBIS ACTIVITY REPORT Stephen Peters (Intel Corporation) Stephen Peters, chair of the IBIS Open Forum, reported on the status of the five major activities now occupying the IBIS committee's attention: IBIS version 4.0 review, IBIS Connector Spec progress, an IBIS futures proposal from Mentor Graphics, work on expanding IBIS into the EMC/EMI world, and the formation of a model quality subgroup. On the subject of IBIS 4.0 review Stephen gave a brief overview of the ten new BIRDs incorporated into the proposed document. He noted that most of the BIRDs dealt with technical clarifications and enhancements to the existing keywords or additions of new test loads or input specifications. One new BIRD (BIRD 73.4) will allow modeling of AVT technology. A review copy of the proposed specification has been upload to the IBIS web page at: http://www.eda.org/pub/ibis/ver4.0_wip/ Stephen went on to explain the ratification process. Over the next two teleconferences the proposed IBIS 4.0 specification will be read. Initial approval is expected before the June IBIS summit, at which point parser development can begin. Feedback from the parser development is expected to result in a revision of the document to IBIS 4.1. Assuming no major roadblocks, IBIS version 4.1 is expected to be voted upon in late 2002, at which point it will be forwarded to the EIA for formal letter ballot. Stephen noted that the connector specification has undergone an extensive editorial and technical review. Keywords have been simplified and made to conform to IBIS conventions. Frequency dependent matrixes, G matrixes and support for S-parameters are now included in the specification, and two new keywords have been added that support general purpose interconnect like that found in packages. Based on current progress, Stephen expects to see revision 1.0 of the connector spec out by mid-year. Stephen reported that the futures committee has set aside its work on IBIS-X and the IBIS macro language (IBIS-ML) in favor of reviewing the proposal from Mentor Graphics. He also reported that EMI and EMC work is continuing, with proposals from both ICEM and Innoveda being considered. Stephen noted that there would be presentations from both Mentor Graphics and the ICEM group later in the program. Finally, Stephen reported that several presentations at the January 28th 2002 IBIS Summit highlighted issues with IBIS model quality. As a result, Barry Katz of Signal Integrity Software has volunteered to form a working group to address model quality. The purpose of this working group is to provide methods for generating accurate models and create metrics to quantify model quality. One possible result is an agreed standard the industry can follow. In the discussion that followed it was asked if Mentor Graphic's proposal would be incorporated into IBIS 4.1. Stephen replied that it depended on if and how fast the BIRD implementing this proposal was reviewed and accepted, but he could imagine it being incorporated into the document while incorporating the feedback from the parser development (i.e. during version 4.1). MULTI-LINGUAL MODELING WITHIN IBIS UPDATE Tom Dagostino and Bob Ross (Mentor Graphics) Tom Dagostino listed a number of benefits of multi-lingual support within IBIS that are currently not adequately covered by the existing IBIS format. These include advances in modeling details such as differential buffers, controlled buffers, SCSI drivers, etc., and also more a complex die interconnect description. A bonus is that IBIS can interface better with true digital analysis through some existing analog/mixed signal (AMS) languages. Tom then illustrated a number of these features using a sample of a complex die that captures a number of real modeling requests and needs. Tom stated that the multi-lingual approach leverages off of existing investments in IBIS, Spice, VHDL-AMS, Verilog-AMS, etc. It still uses IBIS for pinout, package, information and specification data, but calls and executes external files when needed. Seven EDA vendors including some larger ones already offer multi-lingual products that use the above languages and others. Other tools used in PCB design and analysis provide another form of multi-lingual support by importing/exporting Spice code, so such support is natural. The proposal will still recommend the existing IBIS format as appropriate. The proposed extensions are limited to a few new keywords and can provide a fast response to the existing industrial needs. The new keywords are classified as: [External Model] for models defined in other languages [External Circuit] for die interconnect circuit extensions [Node Declarations] and [External Call] for connecting everything together Tom showed a reference model for an I/O buffer. The IBIS electrical connections including power supply rails were shown. These were designated as D_drive, D_enable, and D_receive. Power supply voltages can be supplied by explicitly defined interconnect or as implicit voltage within the external model. The syntax for [External Model] and [External Circuit] was described in general terms. Each external reference contains four elements: name, language, where the file is and the name of the model in the file, and the interface ports. For Spice subcircuits and other language formats requiring analog interfaces for digital controls, some additional A_to_D and D_to_A subparameters are provided to translate digital control signals to or from analog voltage levels. These voltages (such as 0 to 3.3 V or 0 to 1.0 V) would provide the drive signals for Spice subcircuits. Threshold voltage levels would be transformed to digital states. Some of the analog and digital signal names would be reserved to promote model interchangeability. In general, any name is acceptable. The [External Model] keyword would reside within the [Model] keyword (retaining Model_name as the name) and would override all other keywords and subparameters under the [Model] keyword that describe electrical operation. The [Model Spec] keyword is the only one that is not overridden. The connection of the model is completed using the [Node Declarations] and [Circuit Call] keywords. The die side of the pins are considered nodes with the names as the pin numbers. Additional internal nodes are declared as needed. The connection is by mapping ports to nodes in a manner that is conceptually similar to using calls to Spice subcircuits. However, this can be extended to include digital circuit interconnections. Tom listed a few advantages and also raised some issues related to this proposal. To maximize model inter-operability and minimize supporting unique implementations, the IBIS Committee should encourage and endorse the open, public, accepted languages. For example, Berkeley Spice is the subset supported by most vendor specific Spices, is vendor-independent, and is particularly useful for interconnect descriptions. Furthermore, it supports the public BSIM4 model. The VHDL-AMS and Verilog-AMS versions should be the open, standardized versions from independent bodies versus vendor-specific HDLs. Because some of the interaction details have not yet been sorted out, the proposal is still being drafted. It will be issued as a new BIRD7X in the near future. Stephen Peters noted that this proposal is now being discussed by the IBIS Futures Working Group. In the follow-up discussion the question was asked if the proposed model would account for finite stimulus waveforms. Tom replied that it would. Tom was asked to comment on the possibility of having the BIRD incorporate an encryption standard that was mentioned earlier. Tom replied that he wanted to keep the issue of a possible model encryption standard for IBIS models separate from this proposal. UPDATE ON ZUKEN'S IBISINF UTILITY Alexander Loehr and Michael Schaeder (Zuken) Presented by Caroline Legendre of Zuken Caroline Legendre presented an update on Zukens IBISINF Utility. This utility, which is a shareware tool available on the Zuken website, was first described at the 2001 European IBIS summit. This tool is available for NT, Win2K, Solaris, HP-UX and Linux based platforms. The purpose of IBISINF is to simplify detection of common and obvious errors. It does this by checking syntax and semantics, as well as extracting common model parameters. Caroline reported that IBISINF now uses the official golden parser to do these checks. The utility has also been enhanced to write out model waveforms in a spreadsheet compatible (.csv file) format. Caroline then gave a short demonstration of how this feature could be used to edit a waveform file to remove non-monotonic points. Using IBISINF, the waveform is extracted and written to a .csv file which is imported into an Excel spreadsheet. The waveform is modified, then written back out as a text (.txt) file, which is then pasted back into the .ibs file. IBISINF is then run to validate that no errors were introduced by the edit process. Stephen Peters noted that this utility would be a useful tool for assisting in model quality validation. IBIS ST UPDATE Fabrice Boissieres (STMicroelectronics) Fabrice Boissieres presented an overview of how STMicroelectronics produces IBIS files for their ASIC customers. The main problem they face is automating the flow, as they have to handle 1000+ different I/O buffers. The main job of their in-house tools are to reduces the I/V and V/T curves obtained from simulation to 100 points. Their tools also do the comparison (and needed adjustment) of the V-T and I-V tables for endpoint correlation, modify ESD diode curves to get rid of giga amp currents, and finally adjust clamp and I-V tables to get rid of non-monotonicity. Currently, they can create IBIS 2.1 and 3.2 models for low voltage CMOS, TTL, SSTL and PCI buffers. They are investigating producing models for LVDS, SATA and USB2 buffers. Fabrice noted that the STMicroelectronics flow is fully aligned with the quality IBIS flow and has been successfully tested with external customers. They are currently creating a script that will take IO buffer information from their floorplan tool and create a complete IBIS file for an ASIC. Fabrice also noted that customers have difficulty with the signal name limits and syntax imposed by the IBIS standard -- the names in the IBIS file do not match the external pin names the customers assign. Fabrice went on to ask how one would do a complete physical to electrical validation for newer busses like SATA and USB2. Basically, he would like to do a system level simulation that comprehends both the protocol and electrical parts of system. In the discussion that followed it was noted that VHDL-AMS is specifically suited for this type of modeling problem. A short technical discussion was held regarding the origin of giga amp currents in I-V tables for clamps. Tom Dagostino explained that most diode models lack any bulk silicon resistance, thus the forward biased region is incorrectly modeled. CROSSBAR-CURRENT OUT OF CMOS-IBIS-MODELS Katja Koller and Gerald Bannert (Siemens AG) Katja Koller stated that modeling of crossbar currents is motivated by the needs of EMC capable tools. These tools need information on the IO buffer's current draw over time, and one of the currents required is the crossbar currents. Katja introduced the concept of a "Virtual Cpd", which is different than the value of Cpd that is listed in a data book. Virtual Cpd is a measure of the current that flows though an open output from VCC to Gnd during one period T. Virtual Cpd can be different for rising and falling switching cycles, and is calculated from the area under the buffers power supply current vs. time curve. The value and shape of the current curve can be calculated from the static (I-V) and dynamic (V-T) table information contained in an IBIS file. Katja presented a graphical method (overlay of on-off curves) for obtaining this value of crossbar (Ipeak) vs. time curves, and the values obtained show good agreement with HSPICE simulations of the Ipeak value. However, these simulations were done with a single CMOS inverter stage. A predriver stage was added to the HSPICE model, and the results diverged from what was predicted by the curve overlay method. Thus, it was concluded that pre-drive currents could not be ignored when calculating Ipeak. One possible way to do this is assume something like "the predriver is X% of the total driver current". Katja also noted that the accuracy of this method for estimating Ipeak and the shape of the curve is dependent on driver strength, c_comp and slew rate (a faster slew rate introduces more errors). In conclusion Katja stated that because IBIS does not include information on predriver currents, for EMC modeling IBIS should include I(t)-Tables, or explicitly include values for Cpd_rise/Cpd_fall and I_peak. The meeting then adjourned for lunch at the hotel. XML IN IBIS BASED MODELING Alexander Loehr and Michael Schaeder (Zuken) Presented by Caroline Legendre of Zuken Caroline opened her presentation by stating that this work is a follow-on to two presentations delivered by Mike Labonte and Atul Agarwal at previous IBIS summits. The purpose of this presentation is to show how XML simplifies the tool vendors tasks. Caroline stated that the task of the tool vendor is one of data management. Currently, there are many different types of modeling information, and the model itself has many data interdependencies. These problems are general to any data management. Caroline stated that XML will help in this data management by simplifying and regularizing the data structure presented to the tool. She also pointed out that pointed out that every update to the IBIS specification involves parser changes that the tool vendor has to accommodate by changing there API to the data base produced by the golden parser. In an XML environment, an XML parser produces a Document Object Model (DOM) that serves as the regular data representation and API to the application. XML parsers and a standard for the DOM already exist in the industry. In order to take advantage of a DOM, the IBIS committee would need to release a description of the IBIS standard in a DTD schema. In summary, Caroline pointed out two advantages to describing IBIS in XML. One would be a more formal standard definition, the other would be the existence of a standard API and IBIS data structure, thus allowing the tool developers to focus on the real task of updating simulation engines with new IBIS features. During the follow-up question period a discussion was held on where in the above process data checking (like is now performed by the current golden parser) is done. Caroline stated that data checks need to be done before the core application. It was noted that there is no standard way to check XML formatted file. In response to another question, it was noted that an ibis -> xml format translator already exists. Finally, Caroline asked if there was any EDA tool vendors interested in modifying there tools to accept XML formatted IBIS files. The general consensus was that there was no customer demand to do so. BUFFER IMPEDANCE MODELING Luca Giocotto (Alstom Transport) This is a work in progress, inspired by recent thread on the SI_List reflector asking about how to measure the output capacitance of an IO buffer. Luca started his presentation by noting that digital interconnects can be more efficiently analyzed in the frequency domain. Currently, output impedance of buffer is modeled as an RC, where R(v) is from the IV tables. In the time domain, one can use a ramp generator to to compute the output capacitance of a buffer (same method as a capacitance meter might use). This method results in a relatively constant value for C_comp. However, using the same method on the transistor level model that was used to create the IBIS model resulted in a value of C_comp that varies from 1.5pF to 4.5pF. The transistor level output buffer shows that output capacitance varies with applied voltage. In frequency domain, sweeping the transistor model shows that C_comp is not constant with frequency either. In Luca's example there was poor correlation between the RC model and the actual results. The real response had a pole-zero-pole response. Lucia was able to mimic this curve by adding a series RC in parallel with the existing C_comp value. Luca's final step was to account for the C_comp variations with voltage. He did this by making R and C nonlinear, i.e. they vary with voltage. He did this by implementing the R and C using PWL tables. He results then showed close agreement with HSPICE simulations. He is now working to see how this circuit translates into time domain simulations. In the follow-up questions several persons asked how he had derived the values in the C and R tables. Luca's replied that this was done empirically by hand. ICEM INTEGRATED CIRCUITS ELECTROMAGNETIC MODEL IEC 62014-3 STATUS Jean-Claude Perrin (Texas Instruments) and Claude Huet (EADS Airbus) Jean-Claude started his presentation with a summary of the organizations sponsoring this work. The French standards organization UTE is the main sponsor, and formed the ICEM working group in 1994. The working group includes people from both industry and universities. In March of 2001 the current specification (IEC 62041-3) was sent to the IEC for ratification as a standard. Since then the working group has been working on a cookbook. The ICEM spec and cookbook documents are available on the UTE website at: http://www.ute-fr.com Continuing on, Jean-Claude reminded the audience that the goal of the ICEM effort is to model noise from three sources -- power supply lines, IO connections and direct emissions from an IC. Technically, this is accomplished by replacing the core of the device with a current generator that generates noise at the same freq and amp as the real core. To this core model is added IO noise, where the IOs are modeled using IBIS data. Jean-Claude noted that the current generator needs data on Ib, Cb capacitance, etc., which can be supplied by an IBIS file. Jean-Claude then showed model validation results, and how they compare to measured results. He noted that conducted radiation from power lines is dominated by core switching. IO noise only adds a bit of high frequency. When testing in TEM cell, model predictions fit correctly up to 800Mhz. However, direct IC radiation is very difficult to predict accurately, and they are still working on this. On the subject of the ICEM cookbook, Jean-Claude remarked that the best information would come directly from manufacture themselves. He felt that most semiconductor manufactures would have the data already, as they need it to calculate current density inside the ASIC itself. He also noted that the cookbook is scheduled to be completed by July 1, 2002, and then validating the ICEM cookbook would be the next step. He noted also that most parameters can be extracted using a VNA. In summary, Jean-Claude stated that the ICEM model is relatively easy to add to IBIS, and even easier if the proposal from Mentor Graphics is accepted. CLOSE OF MEETING Stephen again thanked the participants for their contributions and the co-sponsors. Several participants commented on the amount of interesting material presented at this meeting and supported IBIS as an appropriate level for the potential extensions. NEXT MEETING: The next teleconference meeting will be on Friday, March 29, 2002 from 8:00 AM to 10:00 AM Pacific time. ============================================================================ NOTES IBIS CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-1831 stephen.peters@intel.com Senior Hardware Engineer, Intel Corporation M/S JF4-215 2111 NE 25th Ave. Hillsboro, OR 97124-5961 VICE CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897 bob_ross@mentor.com Modeling Engineer, Mentor Graphics 8005 S.W. Boeckman Road, Wilsonville, OR 97070 SECRETARY: Guy de Burgh (805) 988-8250, Fax: (805) 988-8259 gdeburgh@innoveda.com Senior Manager, Innoveda 1369 Del Norte Rd. Camarillo, CA 93010-8437 LIBRARIAN: Roy Leventhal (837) 797-2152, Fax: (847) 222-2799 roy_leventhal@3com.com Senior Engineer, CommWorks Corp. (a wholly owned 3Com subsidiary) 1800 W. Central Rd. Mt. Prospect, IL 60056-2293 WEBMASTER: Syed Huq (408) 525-3399, Fax: (408) 526-5504 shuq@cisco.com Manager, Hardware Engineering, Cisco Systems 170 West Tasman Drive San Jose, CA 95134-1706 POSTMASTER: John Angulo (425) 869-2320, Fax: (425) 881-1008 jangulo@innoveda.com Development Engineer, Innoveda 14715 N.E. 95th Street, Suite 200 Redmond, WA 98052 This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: majordomo@eda.org In the body, for the IBIS Open Forum Reflector: subscribe ibis In the body, for the IBIS Users' Group Reflector: subscribe ibis-users Help and other commands: help ibis-request@eda.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org) or both. State your request. ibis-info@eda.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@eda.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. Job posting information is not permitted. ibis-users@eda.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. Job posting information is not permitted. ibischk-bug@eda.org To report ibischk2/3 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs. To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, /pub/ibis/bugs/s2ibis2/bugs2i2.txt, and /pub/ibis/bugs/s2iplt/bugsplt.txt respectively. Information on IBIS technical contents, IBIS participants, and actual IBIS models are available on the IBIS Home page found by selecting the Electronic Information Group under: http://www.eigroup.org/ibis/ibis.htm Check the pub/ibis directory on eda.org for more information on previous discussions and results. You can get on via FTP anonymous. ============================================================================