CONTENT OF THE EUROPEAN IBIS OPEN FORUM SUMMIT MEETING March 11, 2005 Munich, Germany .zip Compressed .ppt, .pps Power Point .doc Word .ps Postscript .pdf Acrobat .txt Text ADMINISTRATIVE DOCUMENTS: 00readme.txt This Document a031105s.txt Agenda m031105s.txt Minutes PRESENTATIONS AND ACTUAL TITLES (IN ACTUAL ORDER OF PRESENTATION): ----------- agenda.pdf Meeting Agenda date_ibis_1.jpg Meeting Picture date_ibis_2.jpg Meeting Picture Arpad Muranyi, Intel Corporation, USA lenski1.zip Siemens IBIS Group (.ppt) lenski1.pdf Eckhard Lenski, Siemens AG, Germany lenski2.zip Can We Stop the Growing Disparity between the Potential of IBIS lenski2.pdf IBIS Model Parameters and the Reality of Delivered Parameterss? (.ppt) Eckhard Lenski, Siemens AG, Germany koller.pdf Modifying IBIS Files Katja Koller, Siemens AG, Germany chitwood.zip An Initial Case Study for BIRD95 - Enhancing IBIS for chitwood.pdf SSO Power Integrity Simulation (.ppt) Sam Chitwood, Raymond Chen and Jiayuan Fang, Sigrity, Inc. USA Presented by Jianyuan Fang maurer.zip IBIS in the Design Chain of Noise Modelling (.ppt) maurer.pdf Manfred Maurer, Siemens AG, Thomas Steinecke, Infineon AG, Germany (Presented by Thomas Steinecke and Manfred Maurer) sicard.zip The Role of IBIS in Near-Field Emmission Prediction of ICs (.ppt) sicard.pdf Etienne Sicard and Alexandre Boyer, National Institute of Applied Science (INSA), France; and Gilles Peres, EADS Airbus Industries, France (Presented by Etienne Sicard) stievano.zip Computer-Assisted Modeling of Digital I/O Buffers for IBIS (.ppt) stievano.pdf Flavio Canavero, Ivan Maio, and Igor Stievano, Politecnico di Torino, Italy; Madhavan Swaminathan, Georgia Institute of Technology, USA; and Paul Franzon, North Carolina State University, USA (Presented by Igor Stievano) schaeder.pdf Considerations on Switching Characteristics Michael Schaeder, Zuken, Germany muranyi.pdf Pre/de-emphasis Buffer Modeling with IBIS Arpad Muranyi and Kuen Yew Lam, Intel Corporation, USA (Presented by Arpad Muranyi) PreDe_emphasis.vhd Pre/De-emphasis VHDL-AMS Program Kuen Yew Lam and Arpad Muranyi, Intel Corporation, USA (updated April 1, 2005, older version in /old directory) rousseau.zip High-Speed Models, The First Step Towards High Speed rousseau.pdf Design Kits (.ppt) Stephane Rousseau, Mentor Graphics, France telian.pdf Modeling Complex IO with IBIS 4.1 Donald Telian, Cadence Design Systems, USA (Presented by Heiko Dudek, Cadence Design Systems/FlowCad, Germany)